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MT58L64V32PF-6IT

Description
Standard SRAM, 64KX32, 3.5ns, CMOS, PBGA165, FBGA-165
Categorystorage    storage   
File Size454KB,25 Pages
ManufacturerMicron Technology
Websitehttp://www.mdtic.com.tw/
Download Datasheet Parametric View All

MT58L64V32PF-6IT Overview

Standard SRAM, 64KX32, 3.5ns, CMOS, PBGA165, FBGA-165

MT58L64V32PF-6IT Parametric

Parameter NameAttribute value
MakerMicron Technology
Parts packaging codeBGA
package instructionTBGA,
Contacts165
Reach Compliance Codeunknown
ECCN code3A991.B.2.A
Maximum access time3.5 ns
JESD-30 codeR-PBGA-B165
JESD-609 codee1
length15 mm
memory density2097152 bit
Memory IC TypeSTANDARD SRAM
memory width32
Number of functions1
Number of terminals165
word count65536 words
character code64000
Operating modeSYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize64KX32
Package body materialPLASTIC/EPOXY
encapsulated codeTBGA
Package shapeRECTANGULAR
Package formGRID ARRAY, THIN PROFILE
Parallel/SerialPARALLEL
Certification statusNot Qualified
Maximum seat height1.2 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3.135 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTIN SILVER COPPER
Terminal formBALL
Terminal pitch1 mm
Terminal locationBOTTOM
width13 mm
2Mb: 128K x 18, 64K x 32/36
PIPELINED, SCD SYNCBURST SRAM
2Mb SYNCBURST
SRAM
FEATURES
• Fast clock and OE# access times
• Single +3.3V +0.3V/-0.165V power supply (V
DD
)
• Separate +3.3V or +2.5V isolated output buffer
supply (V
DD
Q)
• SNOOZE MODE for reduced-power standby
• Single-cycle deselect (Pentium
®
BSRAM-compatible)
• Common data inputs and data outputs
• Individual BYTE WRITE control and GLOBAL
WRITE
• Three chip enables for simple depth expansion
and address pipelining
• Clock-controlled and registered addresses, data
I/Os and control signals
• Internally self-timed WRITE cycle
• Burst control pin (interleaved or linear burst)
• Automatic power-down for portable applications
• 100-lead TQFP for high density, high speed
• 165-lead FBGA
• Low capacitive bus loading
• x18, x32 and x36 options available
MT58L128L18P, MT58L64L32P, MT58L64L36P;
MT58L128V18P, MT58L64V32P, MT58L64V36P
3.3V V
DD
, 3.3V or 2.5V I/O, Pipelined, Single-
Cycle Deselect
100-Pin TQFP*
165-Pin FBGA
(Preliminary Package Data)
OPTIONS
• Timing (Access/Cycle/MHz)
3.5ns/5ns/200 MHz
3.5ns/6ns/166 MHz
4.0ns/7.5ns/133 MHz
5ns/10ns/100 MHz
• Configurations
3.3V I/O
128K x 18
64K x 32
64K x 36
2.5V I/O
128K x 18
64K x 32
64K x 36
• Package
100-pin TQFP
165-pin FBGA
• Operating Temperature Range
Commercial (0°C to +70°C)
Industrial (-40°C to +85°C)
MARKING
-5
-6
-7.5
-10
MT58L128L18P
MT58L64L32P
MT58L64L36P
MT58L128V18P
MT58L64V32P
MT58L64V36P
T
F
None
IT
*JEDEC-standard MS-026 BHA (LQFP).
GENERAL DESCRIPTION
The Micron
®
SyncBurst
SRAM family employs
high-speed, low-power CMOS designs that are fabri-
cated using an advanced CMOS process.
Micron’s 2Mb SyncBurst SRAMs integrate a 128K x
18, 64K x 32, or 64K x 36 SRAM core with advanced
synchronous peripheral circuitry and a 2-bit burst
counter. All synchronous inputs pass through registers
controlled by a positive-edge-triggered single clock
input (CLK). The synchronous inputs include all
• Part Number Example: MT58L128L18PT-10 IT
2Mb: 128K x 18, 64K x 32/36 Pipelined, SCD SyncBurst SRAM
MT58L128L18P_2.p65 – Rev. 3/00
1
Micron Technology, Inc., reserves the right to change products or specifications without notice.
©2000, Micron Technology, Inc.
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