530MC647M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 530MC647M000DGR

530MC647M000DGR: DescriptionLVPECL Output Clock Oscillator, 647MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

530MC647M000DGR Overview

LVPECL Output Clock Oscillator, 647MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

530MC647M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	7%
JESD-609 code	e4
Manufacturer's serial number	530
Installation features	SURFACE MOUNT
Nominal operating frequency	647 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	3.63 V
Minimum supply voltage	2.97 V
Nominal supply voltage	3.3 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

TDA1519 power amplifier circuit diagram

Improvement of British HINARI laser stereo combination sound

Simplified 555 internal circuit

Light change detector drive relay circuit

AC welding machine no-load power-saving circuit

6OXT(1.0) computer motherboard circuit diagram_30

Fuse blown self-healing circuit: The working principle of the circuit of the device is shown in Figure 6. When the fuse FU1 is intact, the neon bulb ND is short-circuited and does not light up, and at the same time, the ① and ② pins ...; yuandayuan6999 DIY/Open Source Hardware

Is my interrupt response time normal?: It takes 1.4ms from the first instruction of ISR to the first instruction of interrupt thread IST response (setting an IO output). Some friends in the forum have tested it and said it only takes 400us...; w19864h Embedded System

How to set the resolution of the target machine in wince5.0: How to set the resolution of the target machine under wince5.0? Please give me some advice. Thank you!...; 86814429 Embedded System

Elevator Control Model (Problem D): [b]I. [/b][b]Task[/b] [table=98%][tr][td] [/td][/tr][/table]Design and make an elevator control model. The schematic diagram is shown in Figure 1. [table=98%][tr][td]In Figure 1: the elevator shaft mo...; f6906 MCU

【CN0270】Complete 4 mA to 20 mA HART Solution: Circuit Functionality and Benefits The circuit shown in Figure 1 uses the AD5700, the industry's lowest power, smallest footprint HART1-compliant IC modem, and the AD5420 16-bit current output DAC to ...; EEWORLD社区 ADI Reference Circuit

How to call functions in other driver .C files from a .C file in WINCE: I now have two drivers, one is a key driver, placed in the E:\ProgramFiles\WINCE500\PLATFORM\smdk2440\DRIVERS\Userkey folder. The other is a buzzer driver, placed in the E:\ProgramFiles\WINCE500\PLATF...; jhqianyuping Embedded System

Shortcut: L0 L1 L2 L3 L4 L5 L6 L7 L8 L9 LA LB LC LD LE LF LG LH LI LJ LK LL LM LN LO LP LQ LR LS LT LU LV LW LX LY LZ M0 M1 M2 M3 M4 M5 M6 M7 M8 M9 MA MB MC MD ME MF MG MH MI MJ MK ML MM MN MO MP MQ MR MS MT MU MV MW MX MY MZ N0 N1 N2 N3 N4 N5 N6 N7 N8 NA NB NC ND NE NF NG NH NI NJ NK NL NM NN NO NP NQ NR NS NT NU NV NX NZ O0 O1 O2 O3 OA OB OC OD OE OF OG OH OI OJ OK OL OM ON OP OQ OR OS OT OV OX OY OZ P0 P1 P2 P3 P4 P5 P6 P7 P8 P9 PA PB PC PD PE PF PG PH PI PJ PK PL PM PN PO PP PQ PR PS PT PU PV PW PX PY PZ Q1 Q2 Q3 Q4 Q5 Q6 Q8 Q9 QA QB QC QE QF QG QH QK QL QM QP QR QS QT QV QW QX QY R0 R1 R2 R3 R4 R5 R6 R7 R8 R9 RA RB RC RD RE RF RG RH RI RJ RK RL RM RN RO RP RQ RR RS RT RU RV RW RX RY RZ

Popular Components