MBM29LV016T-12PTR-E1 datasheet, PDF

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MBM29LV016T-12PTR-E1: DescriptionFlash, 2MX8, 120ns, PDSO40, PLASTIC, REVERSE, TSOP1-40; Categorystorage storage; File Size359KB，55 Pages; ManufacturerSPANSION; Websitehttp://www.spansion.com/; Environmental Compliance

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MBM29LV016T-12PTR-E1 Overview

Flash, 2MX8, 120ns, PDSO40, PLASTIC, REVERSE, TSOP1-40

MBM29LV016T-12PTR-E1 Parametric

Parameter Name	Attribute value
Is it Rohs certified?	conform to
Maker	SPANSION
Parts packaging code	TSOP1
package instruction	PLASTIC, REVERSE, TSOP1-40
Contacts	40
Reach Compliance Code	compliant
ECCN code	EAR99
Maximum access time	120 ns
startup block	TOP
JESD-30 code	R-PDSO-G40
JESD-609 code	e3
length	18.4 mm
memory density	16777216 bit
Memory IC Type	FLASH
memory width	8
Number of functions	1
Number of terminals	40
word count	2097152 words
character code	2000000
Operating mode	ASYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	2MX8
Package body material	PLASTIC/EPOXY
encapsulated code	TSOP1-R
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE
Parallel/Serial	PARALLEL
Peak Reflow Temperature (Celsius)	260
Programming voltage	3 V
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	MATTE TIN
Terminal form	GULL WING
Terminal pitch	0.5 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	40
type	NOR TYPE
width	10 mm

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MBM29LV016T

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MBM29LV016B

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Data Sheet

July 2003

The following document specifies Spansion memory products that are now offered by both Advanced Micro Devices

and Fujitsu. Although the document is marked with the name of the company that originally developed the specifi-

cation, these products will be offered to customers of both AMD and Fujitsu.

Continuity of Specifications

There is no change to this datasheet as a result of offering the device as a Spansion product. Any changes that

have been made are the result of normal datasheet improvement and are noted in the document revision summary,

where supported. Future routine revisions will occur when appropriate, and changes will be noted in a revision sum-

mary.

Continuity of Ordering Part Numbers

AMD and Fujitsu continue to support existing part numbers beginning with “Am” and “MBM”. To order these prod-

ucts, please use only the Ordering Part Numbers listed in this document.

For More Information

Please contact your local AMD or Fujitsu sales office for additional information about Spansion memory solutions.

Publication Number

26829

Revision

Amendment

Issue Date

October 25, 2002

MBM29LV016T

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/MBM29LV016B

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(Continued)

The MBM29LV016T/B is pin and command set compatible with JEDEC standard E

PROMs. Commands are

written to the command register using standard microprocessor write timings. Register contents serve as input

to an internal state-machine which controls the erase and programming circuitry. Write cycles also internally

latch addresses and data needed for the programming and erase operations. Reading data out of the device is

similar to reading from 5.0 V and 12.0 V Flash or EPROM devices.

The MBM29LV016T/B is programmed by executing the program command sequence. This will invoke the

Embedded Program Algorithm which is an internal algorithm that automatically times the program pulse widths

and verifies proper cell margins. Typically, each sector can be programmed and verified in about 0.5 seconds.

Erase is accomplished by executing the erase command sequence. This will invoke the Embedded Erase

Algorithm which is an internal algorithm that automatically preprograms the array if it is not already programmed

before executing the erase operation. During erase, the device automatically times the erase pulse widths and

verifies proper cell margins.

Any individual sector is typically erased and verified in 1.0 second. (If already preprogrammed.)

The device also features a sector erase architecture. The sector mode allows each sector to be erased and

reprogrammed without affecting other sectors. The MBM29LV016T/B is erased when shipped from the factory.

The device features single 3.0 V power supply operation for both read and write functions. Internally generated

and regulated voltages are provided for the program and erase operations. A low V

detector automatically

inhibits write operations on the loss of power. The end of program or erase is detected by Data Polling of DQ

by the Toggle Bit feature on DQ

, or the RY/BY output pin. Once the end of a program or erase cycle has been

comleted, the device internally resets to the read mode.

The MBM29LV016T/B also has a hardware RESET pin. When this pin is driven low, execution of any Embedded

Program Algorithm or Embedded Erase Algorithm is terminated. The internal state machine is then reset to the

read mode. The RESET pin may be tied to the system reset circuitry. Therefore, if a system reset occurs during

the Embedded Program Algorithm or Embedded Erase Algorithm, the device is automatically reset to the read

mode and will have erroneous data stored in the address locations being programmed or erased. These locations

need re-writing after the Reset. Resetting the device enables the system’s microprocessor to read the boot-up

firmware from the Flash memory.

Fujitsu’s Flash technology combines years of Flash memory manufacturing experience to produce the highest

levels of quality, reliability, and cost effectiveness. The MBM29LV016T/B memory electrically erases all bits within

a sector simultaneously via Fowler-Nordhiem tunneling. The bytes are programmed one byte at a time using

the EPROM programming mechanism of hot electron injection.

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