531RB917M000DG datasheet, PDF - EEWORLD Datasheet

Datasheet> All Categories > Passive components> oscillator> 531RB917M000DG

531RB917M000DG: DescriptionLVPECL Output Clock Oscillator, 917MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531RB917M000DG Overview

LVPECL Output Clock Oscillator, 917MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531RB917M000DG Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
package instruction	ROHS COMPLIANT, SMD, 6 PIN
Reach Compliance Code	unknown
Other features	TRAY
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	917 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	LVPECL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	2.75 V
Minimum supply voltage	2.25 V
Nominal supply voltage	2.5 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

How to judge the quality of LED power supply?

Autotransformer schematic diagram

Transistor type water level automatic control circuit 3 (fill-in type) b

CA6140 lathe power-saving control circuit_2

sub-audio tone coder

Field output circuit:TDA8354Q

Talk about standards such as DMX512: Talk about standards like DMX512. Are there any specific files that can be downloaded?...; 雨天等放晴 Embedded System

NXP releases new power management solution integrating low VCEsat transistors and Trench MOSFETs: NXP Semiconductors NV has announced the launch of the PBSM5240PF, an ultra-compact medium- power transistor and N-channel Trench MOSFET in a DFN2020-6 (SOT1118) lead-free plastic package. The DFN2020-...; 恩智浦半导体 Industrial Control Electronics

Keil global variables: How to define a global array in Keil A global array is defined in main.c Define uint16_t global_variable_focus[50] in stm3210x_it.c to receive data from the serial port. After the interrupt occurs, th...; duzhiming stm32/stm8

Wanted to buy usb interface msp430 emulator: As title...; chenzhufly Buy&Sell

Simple explanation of the principle of DDS in FPGA: [i=s]This post was last edited by Jacktang on 2019-4-12 09:06[/i] [size=4]DDS (Direct Digital Synthesizer) is a digital synthesizer. It can easily achieve frequency, phase, and amplitude control by mo...; Jacktang DSP and ARM Processors

TPS75733: [i=s]This post was last edited by ltbytyn on 2014-8-14 22:57[/i] [b]Single output LDO, 3.0A, fixed voltage (3.3V), fast transient response, low quiescent current [/b]...; ltbytyn Analogue and Mixed Signal

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components