531KB323M000DGR datasheet, PDF

Datasheet> All Categories > Passive components> oscillator> 531KB323M000DGR

531KB323M000DGR: DescriptionCMOS/TTL Output Clock Oscillator, 323MHz Nom, ROHS COMPLIANT, SMD, 6 PIN; CategoryPassive components oscillator; File Size215KB，12 Pages; ManufacturerSilicon Laboratories Inc; Environmental Compliance

Download Datasheet Parametric View All

531KB323M000DGR Overview

CMOS/TTL Output Clock Oscillator, 323MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531KB323M000DGR Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Silicon Laboratories Inc
Reach Compliance Code	unknown
Other features	TAPE AND REEL
maximum descent time	0.35 ns
Frequency Adjustment - Mechanical	NO
frequency stability	20%
JESD-609 code	e4
Manufacturer's serial number	531
Installation features	SURFACE MOUNT
Nominal operating frequency	323 MHz
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Oscillator type	CMOS/TTL
physical size	7.0mm x 5.0mm x 1.85mm
longest rise time	0.35 ns
Maximum supply voltage	1.89 V
Minimum supply voltage	1.71 V
Nominal supply voltage	1.8 V
surface mount	YES
maximum symmetry	55/45 %
Terminal surface	Nickel/Gold (Ni/Au)

Preview

Download Datasheet

View All

S i 5 3 0 / 5 31

EVISION

R Y S TA L

S C I L L A T O R

(XO)

(10 M H

Z T O

1.4 G H

)

Features

Available with any-rate output

frequencies from 10 MHz to 945 MHz

and select frequencies to 1.4 GHz

3rd generation DSPLL

with superior

jitter performance

3x better frequency stability than

SAW-based oscillators

Internal fixed crystal frequency

ensures high reliability and low

aging

Available CMOS, LVPECL,

LVDS, and CML outputs

3.3, 2.5, and 1.8 V supply options

Industry-standard 5 x 7 mm

package and pinout

Pb-free/RoHS-compliant

Si5602

Ordering Information:

See page 7.

Applications

SONET/SDH

Networking

SD/HD video

Test and measurement

Clock and data recovery

FPGA/ASIC clock generation

Pin Assignments:

See page 6.

(Top View)

GND

Description

The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry

to provide a low jitter clock at high frequencies. The Si530/531 is available

with any-rate output frequency from 10 to 945 MHz and select frequencies to

1400 MHz. Unlike a traditional XO, where a different crystal is required for

each output frequency, the Si530/531 uses one fixed crystal to provide a

wide range of output frequencies. This IC based approach allows the crystal

resonator to provide exceptional frequency stability and reliability. In addition,

DSPLL clock synthesis provides superior supply noise rejection, simplifying

the task of generating low jitter clocks in noisy environments typically found in

communication systems. The Si530/531 IC based XO is factory configurable

for a wide variety of user specifications including frequency, supply voltage,

output format, and temperature stability. Specific configurations are factory

programmed at time of shipment, thereby eliminating long lead times

associated with custom oscillators.

CLK–

CLK+

Si530 (LVDS/LVPECL/CML)

GND

Functional Block Diagram

CLK– CLK+

CLK

Si530 (CMOS)

Fixed

Frequency

Any-rate

10–1400 MHz

DSPLL

Clock

Synthesis

GND

CLK–

CLK+

Si531 (LVDS/LVPECL/CML)

GND

Rev. 1.1 6/07

Si530/531

Recommended Resources

Half-bridge power conversion circuit diagram

Tacho generator voltage negative feedback circuit

L4962 type switching integrated voltage regulator circuit

Multi-purpose household appliance protection circuit diagram composed of c036

Hemisphere HD-75 high temperature electronic disinfection cabinet circuit diagram

Field output circuit: TA8445K

STM8 I2C communication issue: Dear experts, I am a beginner. I am using STM8S003F3 to debug hardware I2C. There are three devices on the bus, including STM8. When I reset the other two devices with MCU, I found that I2C was occupi...; h_peter stm32/stm8

Let’s analyze this AD timing together: SPI's CPOL=0, CPHA=1, falling edge data is written from the controller to the chip, and rising edge data is read from the chip to the controller. The falling edge of the first clock writes the MSB of ...; gaorz_ 51mcu

Recruiting reverse debugging personnel with high salary! Good treatment! Also recruiting C/C++/Delphi programmers: Recruiting reverse debugging personnel with high salary! Good treatment! At the same time recruiting C/C++/Delphi programmers Work location: Changchun City, Jilin Province Work nature: Full-time (part...; moffice Embedded System

How to debug vxworks: I encountered a problem when using VxWorks, which is described as follows: 1. The system has no applications, only a VXwroks system and timer, serial port, and network port drivers. 2. The system rese...; whwshiyuan1984 Real-time operating system RTOS

RL78 MCU Development Tool --- Code Generator in Code Generator CubeSuite: [color=#333333][font=Arial]MCU experts often overlook this seemingly disabled tool. In fact, don't underestimate it. Code generators exist in the IDEs of many manufacturers (including the European and...; IC爬虫 Renesas Electronics MCUs

ISO's simple classification of RFID series standards: 1.iso Tc 23/sc 19 Wg3 The main standards for animal identification are iso 11784:1996 iso 11785:1996 iso 14223:2000 2.iso Tc 204 The main standards for road traffic information are iso/dtr 14813-1 to ...; tmily RF/Wirelessly

Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

Popular Components