EEWORLDEEWORLDEEWORLD

Part Number

Search

CAT24WC08GWA-1.8REV-F

Description
EEPROM, 1KX8, Serial, CMOS, PDSO8, 0.150 INCH, GREEN, MS-012, SOIC-8
Categorystorage    storage   
File Size505KB,14 Pages
ManufacturerCatalyst
Websitehttp://www.catalyst-semiconductor.com/
Environmental Compliance  
Download Datasheet Parametric View All

CAT24WC08GWA-1.8REV-F Overview

EEPROM, 1KX8, Serial, CMOS, PDSO8, 0.150 INCH, GREEN, MS-012, SOIC-8

CAT24WC08GWA-1.8REV-F Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerCatalyst
Parts packaging codeSOIC
package instructionSOP,
Contacts8
Reach Compliance Codeunknown
ECCN codeEAR99
Maximum clock frequency (fCLK)0.1 MHz
JESD-30 codeR-PDSO-G8
JESD-609 codee4
length4.9 mm
memory density8192 bit
Memory IC TypeEEPROM
memory width8
Number of functions1
Number of terminals8
word count1024 words
character code1000
Operating modeSYNCHRONOUS
Maximum operating temperature105 °C
Minimum operating temperature-40 °C
organize1KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialSERIAL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height1.75 mm
Serial bus typeI2C
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.8 V
Nominal supply voltage (Vsup)3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature40
width3.9 mm
Maximum write cycle time (tWC)10 ms
CAT24WC01/02/04/08/16
1K/2K/4K/8K/16K-Bit Serial EEPROM
FEATURES
I
400 kHz I
2
C Bus Compatible*
I
1.8 to 5.5Volt Operation
I
Low Power CMOS Technology
I
Write Protect Feature
I
Self-Timed Write Cycle with Auto-Clear
I
1,000,000 Program/Erase Cycles
I
100 Year Data Retention
I
8-pin DIP, SOIC, TSSOP and MSOP packages
- "Green" package option available
I
Commercial, Industrial, Automotive and
— Entire Array Protected When WP at V
IH
I
Page Write Buffer
Extended Temperature Ranges
DESCRIPTION
The CAT24WC01/02/04/08/16 is a 1K/2K/4K/8K/16K-
bit Serial CMOS EEPROM internally organized as 128/
256/512/1024/2048 words of 8 bits each. Catalyst’s
advanced CMOS technology substantially reduces de-
vice power requirements. The the CAT24WC01/02/04/
08/16 feature a 16-byte page write buffer. The device
operates via the I
2
C bus serial interface, has a special
write protection feature, and is available in 8-pin DIP,
SOIC, TSSOP and MSOP packages.
PIN CONFIGURATION
DIP Package (P, L, GL)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
BLOCK DIAGRAM
SOIC Package (J, W, GW)
EXTERNAL LOAD
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
5020 FHD F01
DOUT
ACK
VCC
VSS
WORD ADDRESS
BUFFERS
SENSE AMPS
SHIFT REGISTERS
COLUMN
DECODERS
TSSOP Package (U, Y, GY)
MSOP Package (R, Z, GZ)
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
VCC
WP
SCL
SDA
(MSOP and TSSOP available for CAT24WC01,
CAT24WC02 and CAT24WC04 only)
SDA
VCC
WP
SCL
SDA WP
START/STOP
LOGIC
A0
A1
A2
VSS
1
2
3
4
8
7
6
5
XDEC
CONTROL
LOGIC
E
2
PROM
PIN FUNCTIONS
Pin Name
A0, A1, A2
SDA
SCL
WP
V
CC
V
SS
Function
Device Address Inputs
Serial Data/Address
Serial Clock
Write Protect
+1.8V to +5.5V Power Supply
Ground
SCL
A0
A1
A2
STATE COUNTERS
SLAVE
ADDRESS
COMPARATORS
HIGH VOLTAGE/
TIMING CONTROL
DATA IN STORAGE
* Catalyst Semiconductor is licensed by Philips Corporation to carry the I
2
C Bus Protocol.
© 2005 by Catalyst Semiconductor, Inc.
Characteristics subject to change without notice
1
Doc. No. 1022, Rev. N
[Push analog electronics to the end] ADC and DAC learning week
The weather is getting colder, but the enthusiasm for learning cannot fade. Fortunately, we have EEWORLD, so we can stay at home, in the dormitory, or in the office. As long as we can access the Inter...
小娜 Analogue and Mixed Signal
STC
Hey guys, does anyone have information about STC? I need it urgently....
liuyan_12 MCU
When downloading an application, the program in the library is not included and cannot be added?
When building, the target application is generated, which includes the static library I want to use. It contains the function that my program wants to call (already defined), but when downloading, it ...
yushulei Embedded System
FPGA and DSP, the difference between the two is so big
FPGA is a programmable silicon chip, and DSP is digital signal processing. When system designers are in the architectural design stage of the project, they face the important question of whether to us...
fish001 DSP and ARM Processors
---------How to realize shutdown alarm in WinCE?----------
rt, that is, the time alarm can be realized not only when the machine is turned on....
chinafengxq Embedded System
Ask TI, does the expert group here have any experience in TI wireless?
RT, I want to ask some questions about RF...
linhao2010 DSP and ARM Processors

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 624  481  539  829  2795  13  10  11  17  57 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号