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TC74VHC21FN

Description
Dual 4-Input AND Gate
Categorylogic    logic   
File Size198KB,9 Pages
ManufacturerToshiba Semiconductor
Websitehttp://toshiba-semicon-storage.com/
Download Datasheet Parametric Compare View All

TC74VHC21FN Overview

Dual 4-Input AND Gate

TC74VHC21FN Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?incompatible
MakerToshiba Semiconductor
Parts packaging codeSOIC
package instructionSOP, SOP14,.25
Contacts14
Reach Compliance Codeunknow
Other featuresNOT AVAILABLE IN JAPAN
seriesAHC/VHC
JESD-30 codeR-PDSO-G14
length8.65 mm
Load capacitance (CL)50 pF
Logic integrated circuit typeAND GATE
MaximumI(ol)0.008 A
Number of functions2
Number of entries4
Number of terminals14
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeSOP
Encapsulate equivalent codeSOP14,.25
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply2/5.5 V
Prop。Delay @ Nom-Su8 ns
propagation delay (tpd)12 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.75 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)2 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal formGULL WING
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width3.9 mm
TC74VHC21F/FN/FT/FK
TOSHIBA CMOS Digital Integrated Circuit
Silicon Monolithic
TC74VHC21F,TC74VHC21FN,TC74VHC21FT,TC74VHC21FK
Dual 4-Input AND Gate
The TC74VHC21 is an advanced high speed CMOS 4-INPUT
AND GATE fabricated with silicon gate C
2
MOS technology.
It achieves the high speed operation similar to equivalent
Bipolar Schottky TTL while maintaining the CMOS low power
dissipation.
The internal circuit is composed of 4 stages including a buffer
output, which provide high noise immunity and stable output.
An input protection circuit ensures that 0 to 5.5 V can be
applied to the input pins without regard to the supply voltage.
This device can be used to interface 5 V to 3 V systems and two
supply systems such as battery back up. This circuit prevents
device destruction due to mismatched supply and input voltages.
Note: xxxFN (JEDEC SOP) is not available in
Japan.
TC74VHC21F
TC74VHC21FN
Features
High speed: t
pd
= 3.3 ns (typ.) at V
CC
= 5 V
Low power dissipation: I
CC
= 2
μA
(max) at Ta = 25°C
High noise immunity: V
NIH
= V
NIL
= 28% V
CC
(min)
Power down protection is provided on all inputs.
Balanced propagation delays: t
pLH
t
pHL
Wide operating voltage range: V
CC (opr)
= 2 to 5.5 V
Pin and function compatible with 74ALS21
TC74VHC21FT
TC74VHC21FK
Weight
SOP14-P-300-1.27A
SOL14-P-150-1.27
TSSOP14-P-0044-0.65A
VSSOP14-P-0030-0.50
: 0.18 g (typ.)
: 0.12 g (typ.)
: 0.06 g (typ.)
: 0.02 g (typ.)
1
2008-05-01

TC74VHC21FN Related Products

TC74VHC21FN TC74VHC21F TC74VHC21FK TC74VHC21F_08 TC74VHC21FT
Description Dual 4-Input AND Gate Dual 4-Input AND Gate Dual 4-Input AND Gate Dual 4-Input AND Gate Dual 4-Input AND Gate
Is it lead-free? Lead free Lead free - - Lead free
Is it Rohs certified? incompatible conform to - - incompatible
Maker Toshiba Semiconductor Toshiba Semiconductor Toshiba Semiconductor - Toshiba Semiconductor
Parts packaging code SOIC SOIC SSOP - TSSOP
package instruction SOP, SOP14,.25 SOP, SOP14,.3 VSSOP, - TSSOP, TSSOP14,.25
Contacts 14 14 14 - 14
Reach Compliance Code unknow unknow unknow - unknow
series AHC/VHC AHC/VHC AHC/VHC/H/U/V - AHC/VHC
JESD-30 code R-PDSO-G14 R-PDSO-G14 R-PDSO-G14 - R-PDSO-G14
length 8.65 mm 10.3 mm 4 mm - 5 mm
Load capacitance (CL) 50 pF 50 pF - - 50 pF
Logic integrated circuit type AND GATE AND GATE AND GATE - AND GATE
MaximumI(ol) 0.008 A 0.008 A - - 0.008 A
Number of functions 2 2 2 - 2
Number of entries 4 4 4 - 4
Number of terminals 14 14 14 - 14
Maximum operating temperature 85 °C 85 °C 85 °C - 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C - -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code SOP SOP VSSOP - TSSOP
Encapsulate equivalent code SOP14,.25 SOP14,.3 - - TSSOP14,.25
Package shape RECTANGULAR RECTANGULAR RECTANGULAR - RECTANGULAR
Package form SMALL OUTLINE SMALL OUTLINE SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH - SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Peak Reflow Temperature (Celsius) NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED
power supply 2/5.5 V 2/5.5 V - - 2/5.5 V
Prop。Delay @ Nom-Su 8 ns 8 ns - - 8 ns
propagation delay (tpd) 12 ns 12 ns 12 ns - 12 ns
Certification status Not Qualified Not Qualified Not Qualified - Not Qualified
Schmitt trigger NO NO - - NO
Maximum seat height 1.75 mm 1.9 mm 1 mm - 1.2 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V - 5.5 V
Minimum supply voltage (Vsup) 2 V 2 V 2 V - 2 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V - 3.3 V
surface mount YES YES YES - YES
technology CMOS CMOS CMOS - CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL - INDUSTRIAL
Terminal form GULL WING GULL WING GULL WING - GULL WING
Terminal pitch 1.27 mm 1.27 mm 0.5 mm - 0.65 mm
Terminal location DUAL DUAL DUAL - DUAL
Maximum time at peak reflow temperature NOT SPECIFIED NOT SPECIFIED - - NOT SPECIFIED
width 3.9 mm 5.3 mm 3 mm - 4.4 mm
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