IDT74ALVC16260PF8 datasheet, PDF

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IDT74ALVC16260PF8: DescriptionMultiplexer And Demux/Decoder, ALVC/VCX/A Series, 12-Func, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56; Categorylogic logic; File Size71KB，7 Pages; ManufacturerIDT (Integrated Device Technology)

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IDT74ALVC16260PF8 Overview

Multiplexer And Demux/Decoder, ALVC/VCX/A Series, 12-Func, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56

IDT74ALVC16260PF8 Parametric

Parameter Name	Attribute value
Maker	IDT (Integrated Device Technology)
Parts packaging code	SSOP
package instruction	TSSOP,
Contacts	56
Reach Compliance Code	unknown
series	ALVC/VCX/A
JESD-30 code	R-PDSO-G56
JESD-609 code	e0
length	11.3 mm
Logic integrated circuit type	MULTIPLEXER AND DEMUX/DECODER
Number of functions	12
Number of terminals	56
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output characteristics	3-STATE
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	TSSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification status	Not Qualified
Maximum seat height	1.2 mm
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	2.7 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	TIN LEAD
Terminal form	GULL WING
Terminal pitch	0.4 mm
Terminal location	DUAL
width	4.4 mm

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IDT74ALVC16260

3.3V CMOS 12-BIT TO 24-BIT MULTIPLEXED D-TYPE LATCH

INDUSTRIAL TEMPERATURE RANGE

3.3V CMOS 12-BIT TO

24-BIT MULTIPLEXED

D-TYPE LATCH WITH

3-STATE OUTPUTS

• 0.5 MICRON CMOS Technology

• Typical t

SK(o)

(Output Skew) < 250ps

• ESD > 2000V per MIL-STD-883, Method 3015; > 200V using

machine model (C = 200pF, R = 0)

• V

= 3.3V ± 0.3V, Normal Range

• V

= 2.7V to 3.6V, Extended Range

• V

= 2.5V ± 0.2V

• CMOS power levels (0.4µ W typ. static)

• Rail-to-Rail output swing for increased noise margin

• Available in SSOP, TSSOP, and TVSOP packages

IDT74ALVC16260

FEATURES:

DESCRIPTION:

DRIVE FEATURES:

• High Output Drivers: ±24mA

• Suitable for heavy loads

APPLICATIONS:

• 3.3V high speed systems

• 3.3V and lower voltage computing systems

This 12-bit to 24-bit multiplexed D-type latch is built using advanced dual

metal CMOS technology. The ALVC16260 is used in applications in which

two separate data paths must be multiplexed onto, or demultiplexed from,

a single data path. Typical applications include multiplexing and/or demultiplexing

address and data information in microprocessor or bus-interface applica-

tions. This device also is useful in memory interleaving applications.

Three 12-bit I/O ports (A1-A12, 1B1-1B12, and 2B1-2B12) are avail-

able for address and/or data transfer. The output-enable (OE2B,

OE2B,

and

OEA)

inputs control the bus transceiver functions. The

OE2B

and

OE2B

control signals also allow bank control in the A-to-B direction. Address and/

or data information can be stored using the internal storage latches. The

latch-enable (LE1B, LE2B, LEA1B, and LEA2B) inputs are used to control

data storage. When the latch-enable input is high, the latch is transparent.

When the latch-enable input goes low, the data present at the inputs is

latched and remains latched until the latch-enable input is returned high.

The ALVC16260 has been designed with a ±24mA output driver. This

driver is capable of driving a moderate to heavy load while maintaining

speed performance.

FUNCTIONAL BLOCK DIAGRAM

OE1B

LEA1B

A-1B

LATCH

1:12

LE1B

SEL

OEA

1B-A

LATCH

1:12

LE2B

2B-A

LATCH

LEA2B

OE2B

A-2B

LATCH

1:12

The IDT logo is a registered trademark of Integrated Device Technology, Inc.

INDUSTRIAL TEMPERATURE RANGE

MARCH 1999

DSC-4536/2

IDT74ALVC16260PF8 Related Products

	IDT74ALVC16260PF8	IDT74ALVC16260PV8	IDT74ALVC16260PA8
Description	Multiplexer And Demux/Decoder, ALVC/VCX/A Series, 12-Func, True Output, CMOS, PDSO56, 0.40 MM PITCH, TVSOP-56	Multiplexer And Demux/Decoder, ALVC/VCX/A Series, 12-Func, True Output, CMOS, PDSO56, 0.635 MM PITCH, SSOP-56	Multiplexer And Demux/Decoder, ALVC/VCX/A Series, 1-Func, 12 Line Input, 24 Line Output, True Output, CMOS, PDSO56, TSSOP-56
Parts packaging code	SSOP	SSOP	TSSOP
package instruction	TSSOP,	SSOP,	TSSOP-56
Contacts	56	56	56
Reach Compliance Code	unknown	unknown	unknown
series	ALVC/VCX/A	ALVC/VCX/A	ALVC/VCX/A
JESD-30 code	R-PDSO-G56	R-PDSO-G56	R-PDSO-G56
JESD-609 code	e0	e0	e0
length	11.3 mm	18.415 mm	14 mm
Logic integrated circuit type	MULTIPLEXER AND DEMUX/DECODER	MULTIPLEXER AND DEMUX/DECODER	MULTIPLEXER AND DEMUX/DECODER
Number of functions	12	12	1
Number of terminals	56	56	56
Maximum operating temperature	85 °C	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C	-40 °C
Output characteristics	3-STATE	3-STATE	3-STATE
Output polarity	TRUE	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	TSSOP	SSOP	TSSOP
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH	SMALL OUTLINE, SHRINK PITCH	SMALL OUTLINE, THIN PROFILE, SHRINK PITCH
Certification status	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	1.2 mm	2.794 mm	1.2 mm
Maximum supply voltage (Vsup)	3.6 V	3.6 V	2.7 V
Minimum supply voltage (Vsup)	2.7 V	2.7 V	2.3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V	2.5 V
surface mount	YES	YES	YES
technology	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL	INDUSTRIAL
Terminal surface	TIN LEAD	TIN LEAD	TIN LEAD
Terminal form	GULL WING	GULL WING	GULL WING
Terminal pitch	0.4 mm	0.635 mm	0.5 mm
Terminal location	DUAL	DUAL	DUAL
width	4.4 mm	7.5 mm	6.1 mm
Maker	IDT (Integrated Device Technology)	-	IDT (Integrated Device Technology)

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