ZL10039
Digital Satellite Tuner
with RF Bypass
Data Sheet
Features
•
•
•
•
•
•
•
•
•
•
Direct conversion tuner for quadrature down
conversion from L-band to Zero IF
Symbol rate 1-45 MSps
Excellent sensitivity <-84.5 dBm at 27.5 MSps
Independent RF AGC and baseband gain control
Fifth order baseband filters with bandwidth
adjustable from 6 to 43 MHz
Fully integrated alignment-free low phase noise
local oscillator
Selectable RF Bypass
I
2
C compatible control
3.3 Volt Supply
28 pin 5x5 mm QFN Package
Ordering Information
ZL10039LCG
ZL10039LCF
ZL10039LCG1
ZL10039LCF1
*Pb
28 Pin QFN Trays
28 Pin QFN Tape and Reel
28 Pin QFN* Trays
28 Pin QFN* Tape and Reel
Free Matte Tin
July 2005
-10°C to +85°C
Description
The ZL10039 is a fully integrated direct conversion
tuner for digital satellite receiver systems, targeted
primarily at free-to-air DVB-S receivers where high
sensitivity is a priority. The device also contains a RF
Bypass for connecting to a second receiver module.
The ZL10039 is simple to use, requiring no alignment
or tuning algorithms and uses a minimum number of
external components. The device is programmable via
a I
2
C compatible bus.
A complete reference design (ZLE10541) is available
using ZL10313 demodulator.
Applications
•
•
DVB-S Free-to-Air Satellite receiver systems
8PSK Satellite Receiver Systems
RF AGC
ZL10039
I
RF Input
Q
Bypass
Output
Quadrature
I
2
C
Control
VCO
PLL
Loop
Filter
Crystal
Figure 1 - Basic Block Diagram
1
Zarlink Semiconductor Inc.
Zarlink, ZL and the Zarlink Semiconductor logo are trademarks of Zarlink Semiconductor Inc.
Copyright 2005, Zarlink Semiconductor Inc. All Rights Reserved.
ZL10313
QPSK Demodulator
ZL10039
Table of Contents
Data Sheet
1.0 Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.1 Functional Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2 Signal Path . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.1 RF Input . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.2 Baseband . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6
1.2.3 RF bypass . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3 Local Oscillator Generation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3.1 On Chip VCO . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.3.2 PLL Frequency Synthesiser . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7
1.4 I2C Interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8
2.0 Register Map and Programming. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9
2.1 PLL Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10
2.2 RF Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11
2.3 Base Band Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12
2.4 Local Oscillator Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13
2.5 General Control Register. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15
3.0 Applications Information. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
4.0 Pin Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19
5.0 Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
6.0 Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22
7.0 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
8.0 Typical Performance Data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
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Zarlink Semiconductor Inc.
ZL10039
List of Figures
Data Sheet
Figure 1 - Basic Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1
Figure 2 - Pin Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4
Figure 3 - Detailed Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5
Figure 4 - Typical Application with ZL10313 Demodulator. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16
Figure 5 - Gain v. RFAGC at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 6 - Gain v RFAGC v. Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27
Figure 7 - IIP3 v Gain at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 8 - IIP3 v Gain v Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28
Figure 9 - IIP2 v Gain at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 10 - IIP2 v Gain v Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29
Figure 11 - Noise Figure v Freq at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 12 - Noise Figure v RFin v Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30
Figure 13 - LO Phase Noise at 25°C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 14 - LO Phase Noise v Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31
Figure 15 - RFin, RF Bypass Return Loss . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 16 - RF Bypass Gain v Temperature. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32
Figure 17 - Baseband Filter Response 26.5 MHz . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33
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Zarlink Semiconductor Inc.
ZL10039
SLEEP
IOUT
VccBB
QOUT
QOUT
Data Sheet
SDA
P0
XCAP
XTAL
VccDIG
VccCP
PUMP
SCL
IOUT
RFAGC
N/C
N/C
ZL10039
1
PAD/REF
VccLO
RFBYPASS
VccVCO
Vvar
LOTEST
VccRF2
N/C
RFIN
N/C
VccRF1
Ground - Package Paddle
Figure 2 - Pin Diagram
Pin #
1
2
3
4
5
6
7
8
9
10
11
12
13
14
Name
Vvar
PAD/REF
VccVCO
VccLO
LOTEST
VccRF2
VccRF1
N/C
RFIN
N/C
N/C
N/C
RFAGC
Description
LO Tuning Voltage
Vvar Reference Ground
/ Continuity Test
VCO Supply
LO Supply
LO Test pin - do not connect
RF Supply
RF Supply
Not connected
RF Input
Not connected
Not connected
Not connected
RF Gain control input
Pin #
15
16
17
18
19
20
21
22
23
24
25
26
27
28
Name
QOUT
QOUT
VccBB
IOUT
IOUT
SLEEP
SCL
SDA
P0
XCAP
XTAL
VccDIG
VccCP
PUMP
Description
Q Channel baseband output
Q Channel baseband output
Baseband Supply
I Channel baseband output
I Channel baseband output
Hardware power down input
I
2
C Clock
I
2
C Data
General purpose switching output
Crystal oscillator feedback
Crystal oscillator crystal input
Digital Supply
Varactor Tuning Supply
PLL charge pump output
RFBYPASS RF Bypass output
Table 1 - Pin Names
Note: Ground contact is via underside of package. Pin 2 is connected to ground internally.
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Zarlink Semiconductor Inc.
ZL10039
Data Sheet
BF
BANDWIDTH
ADJUST
VccBB
QOUT
VccRF1
VccRF2
FILTER
QOUT
RFAGC
DC
CORRECTION
DC
CORRECTION
RFIN
LNA
AGC
IOUT
FILTER
IOUT
90 deg
RFBYPASS
0 deg
PHASE
SPLITTER
VccLO
LOTEST
Vvar
PAD/REF
VccVCO
(PADDLE)
LOCK
DETECT
VCO
BANK
15 BIT
PROGRAMMABLE
DIVIDER
Fpd
CHARGE
PUMP
PUMP
VccCP
VccDIG
Fcomp
SDA
SCL
I2C BUS
INTERFACE
PORT
INTERFACE
P0
SLEEP
XTAL
XCAP
REF
OSC
REFERENCE DIVIDER
Figure 3 - Detailed Block Diagram
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Zarlink Semiconductor Inc.