DDU8C3-Z896 datasheet, PDF - EEWORLD Datasheet

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DDU8C3-Z896: DescriptionActive Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDIP8, DIP-8; Categorylogic logic; File Size105KB，4 Pages; ManufacturerData Delay Devices

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DDU8C3-Z896 Overview

Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDIP8, DIP-8

DDU8C3-Z896 Parametric

Parameter Name	Attribute value
Maker	Data Delay Devices
package instruction	DIP-8
Reach Compliance Code	compliant
Other features	LG-MAX
series	DDU
JESD-30 code	R-PDIP-T8
length	12.7 mm
Logic integrated circuit type	ACTIVE DELAY LINE
Number of functions	1
Number of taps/steps	5
Number of terminals	8
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Output polarity	TRUE
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
programmable delay line	NO
Maximum supply voltage (Vsup)	3.6 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Total delay nominal (td)	250 ns
width	7.62 mm

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DDU8C3-Z896

5-TAP, 3.3V CMOS-INTERFACED

FIXED DELAY LINE

(SERIES DDU8C3-Z896)

FEATURES



Five equally spaced outputs

Fits standard 8-pin DIP socket

Low profile

Auto-insertable (DIP version)

Input & outputs fully CMOS interfaced & buffered

10 T L fan-out capability

PACKAGES

GND

VDD

DDU8C3-Z896 DIP

DDU8C3-Z896A1 Gull-Wing

FUNCTIONAL DESCRIPTION

The DDU8C3-Z896 and DDU8C3-Z896A1 devices are 5-tap digitally

buffered delay lines. The signal input (IN) is reproduced at the tap outputs

(T1-T5), shifted in time by 50ns per tap. The total delay is nominally 250ns.

PIN DESCRIPTIONS

T1-T5

VDD

GND

Signal Input

Tap Outputs

+3.3 Volts

Ground

SERIES SPECIFICATIONS



Minimum input pulse width:

100ns

Output rise time:

2ns typical

Supply voltage:

3.3VDC



0.3V

Supply current:

CCL

= 16ma typical

CCH

= 10a typical

Operating temperature:

-40 to 85 C

Temp. coefficient of total delay:

300 PPM/C

DASH NUMBER SPECIFICATIONS

Part

Number

DDU8C3-Z896

DDU8C3-Z896A1

Total

Delay (ns)

250



12.5

250



12.5

Delay Per

Tap (ns)

50.0



5.0

50.0



5.0

20%

VDD IN

T5 GND

Functional Diagram

2014

Data Delay Devices

Doc #14014

9/2/2014

DATA DELAY DEVICES, INC.

3 Mt. Prospect Ave. Clifton, NJ 07013

DDU8C3-Z896 Related Products

	DDU8C3-Z896	DDU8C3-Z896A1
Description	Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDIP8, DIP-8	Active Delay Line, 1-Func, 5-Tap, True Output, CMOS, PDSO8, SOP-8
Maker	Data Delay Devices	Data Delay Devices
package instruction	DIP-8	SOP-8
Reach Compliance Code	compliant	compliant
Other features	LG-MAX	LG-MAX
series	DDU	DDU
JESD-30 code	R-PDIP-T8	R-PDSO-G8
length	12.7 mm	13.208 mm
Logic integrated circuit type	ACTIVE DELAY LINE	ACTIVE DELAY LINE
Number of functions	1	1
Number of taps/steps	5	5
Number of terminals	8	8
Maximum operating temperature	85 °C	85 °C
Minimum operating temperature	-40 °C	-40 °C
Output polarity	TRUE	TRUE
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	DIP	SOP
Package shape	RECTANGULAR	RECTANGULAR
Package form	IN-LINE	SMALL OUTLINE
programmable delay line	NO	NO
Maximum supply voltage (Vsup)	3.6 V	3.6 V
Minimum supply voltage (Vsup)	3 V	3 V
Nominal supply voltage (Vsup)	3.3 V	3.3 V
surface mount	NO	YES
technology	CMOS	CMOS
Temperature level	INDUSTRIAL	INDUSTRIAL
Terminal form	THROUGH-HOLE	GULL WING
Terminal pitch	2.54 mm	2.54 mm
Terminal location	DUAL	DUAL
Total delay nominal (td)	250 ns	250 ns
width	7.62 mm	6.858 mm

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