EEWORLDEEWORLDEEWORLD

Part Number

Search

LP49-44-FREQ8-20G1CG

Description
Parallel - Fundamental Quartz Crystal, 13MHz Min, 15MHz Max, ROHS COMPLIANT PACKAGE-2
CategoryPassive components    Crystal/resonator   
File Size92KB,6 Pages
ManufacturerPletronics
Environmental Compliance  
Download Datasheet Parametric View All

LP49-44-FREQ8-20G1CG Overview

Parallel - Fundamental Quartz Crystal, 13MHz Min, 15MHz Max, ROHS COMPLIANT PACKAGE-2

LP49-44-FREQ8-20G1CG Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerPletronics
package instructionROHS COMPLIANT PACKAGE-2
Reach Compliance Codecompliant
Other featuresAT-CUT CRYSTAL; BULK
Ageing5 PPM/YEAR
Crystal/Resonator TypePARALLEL - FUNDAMENTAL
Drive level1000 µW
frequency stability0.003%
frequency tolerance20 ppm
JESD-609 codee3
load capacitance44 pF
Manufacturer's serial numberLP49
Installation featuresTHROUGH HOLE MOUNT
Maximum operating frequency15 MHz
Minimum operating frequency13 MHz
Maximum operating temperature70 °C
Minimum operating temperature
physical sizeL10.8XB4.47XH3.56 (mm)/L0.425XB0.176XH0.14 (inch)
Series resistance50 Ω
surface mountNO
Terminal surfaceMatte Tin (Sn)
LP21 / LP24 / LP49 Series
Low Profile Crystal
February 2010
• The Pletronics’ LP49 Series is a low profile
thru-hole crystal
• Bulk packaging
• 3 MHz to 70 MHz
• HC-49/US
• AT Cut Crystal
LP21 0.082 (2.10mm) high
LP24 0.100 (2.50mm) high
LP49 0.140 (3.56mm) high
Pletronics Inc. certifies this device is in accordance with the
RoHS (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead (<1000 ppm), Mercury, PBB’s, PBDE’s
Weight of the Device: 0.62 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e1, e2 or e3
Electrical Specification:
Item
Frequency Range
Calibration Frequency Tolerance
Frequency Stability over OTR
Equivalent Series Resistance
(ESR)
Min
3
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
Drive Level
Shunt Capacitance
Aging per year
Specified Temperature Range
Storage Temperature Range
(C0)
-
-
-5
-40
-55
Max
70
-
-
200
150
120
100
80
70
60
50
40
35
100
80
60
1
7
+5
+85
+125
Unit
MHz
ppm
ppm
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
Ohms
mW
pF
ppm
o
o
Condition
AT cut
at +25
o
C + 3
o
C
_
see table on page 3 for
available options
LP49
LP49/LP24
LP49/LP24
LP49/LP24
LP49/LP24
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
LP49/LP24/LP21
3
rd
Overtone
Fundamental
3 MHz to 4 MHz
4 MHz to 5 MHz
5 MHz to 6 MHz
6 MHz to 7 MHz
7 MHz to 9 MHz
9 MHz to 10 MHz
10 MHz to 13 MHz
13 MHz to 15 MHz
15 MHz to 27 MHz
27 MHz to 30 MHz
27 MHz to 32 MHz
32 MHz to 50 MHz
50 MHz to 70 MHz
use 10 µW for testing
Pad to Pad capacitance
at +25
o
C + 3
o
C
_
see table on page 3 for available options
C
C
Product information is current as of publication date. The product conforms
to specifications per the terms of the Pletronics limited warranty. Production
processsing does not necessarily include testing of all parameters.
Copyright © 2010, Pletronics Inc.
Is it OK to choose 5V or 6V for the power supply of 430 microcontroller?
Is it okay to choose 5V or 6V as the power supply for the 430 microcontroller? I use the 169 model....
????? Microcontroller MCU
How to make a USB boot disk?
Can someone please tell me the main steps....
langniao Embedded System
arm+wince data acquisition, how to increase the sampling rate? How to control DAC to output high-frequency waveform
We are working on a project now. The hardware is the Altair ARM8019 industrial control board + Altair ART2000 PC104 bus interface data acquisition card and DAC output. The WINCE system is installed on...
zhaopingsong Embedded System
Summary of RC, LC, and RL circuit characteristics
Summary of RC, LC, and RL circuit characteristics...
tiankai001 Analog electronics
[Source code sharing] Two's complement multiplier and two's complement divider
[i=s]This post was last edited by k331922164 on 2014-2-5 13:14[/i]They are all serial algorithms, written in VHDL [url=[Open Source]Design of FPGA-based serial multiplier[url]https://bbs.eeworld.com.c...
k331922164 FPGA/CPLD
[Atria Development Board AT32F421 Review] - TEST04 Fast ADC Test
[i=s]This post was last edited by Gen_X on 2021-5-8 14:44[/i]In the previous FFT test, for the ADC acquisition clock of AT32F421, in order to make the test go smoothly, a 10MHz ADC acquisition clock w...
Gen_X Domestic Chip Exchange

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1071  594  532  2822  1653  22  12  11  57  34 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号