Z8C520 datasheet, PDF - EEWORLD Datasheet

P

RELIMINARY

P

RODUCT

S

PECIFICATION

Z8E520/C520

1.5 MBPS USB L

OW

-P

OWER

D

EVICE

C

ONTROLLER

F

OR

M

ULTIPROTOCOL

P

OINTING

D

EVICES

FEATURES

Part

Number

Z8E520 (OTP)

Z8C520 (ROM)

s

1

ROM

(KB)

6

RAM

(Bytes)

176

Speed

(MHz)

12

s

Software Programmable Timers Configurable as:

– Two 8-Bit Standard Timers and One 16-Bit

Standard Timer or

–

One 16-Bit Standard Timer and One 16-Bit Pulse

Width Modulator (PWM) Timer

Six Vectored Interrupts with Fixed Priority

Processor Speed Dividable by Firmware Control

Operating Current: 5 mA typical in USB Mode; 2.5 mA

typical in Serial Mode (@ 3 MHz); 5 mA typical in PS/2

Mode

16 Total Input/Output Pins (Open-Drain/Push-Pull)

Configurable

6 inputs with 3 level Programmable Reference

Comparators

16-Bit Programmable Watch-Dog Timer (WDT) with

Internal RC Oscillator

s

Identical Masked ROM Version (Z8C520)

On-Chip Oscillator that accepts a Ceramic Resonator or

External Clock

Hardware Support for PS/2, Serial, USB, and General-

Purpose I/O (GPIO)

Power Reduction Modes:

– STOP Mode (functionality shut down except SMR)

– HALT Mode (XTAL still running-peripherals active)

USB SIE Compliant with USB Spec 1.0

4.0 VDC to 6.0 VDC Operating Range @ 0

°

C to +70

°

C

s

GENERAL DESCRIPTION

Zilog’s Z8E520 (OTP) and Z8C520 (Masked ROM) micro-

controllers are low-power Z8

Plus

MCUs, designed for the

cost-effective implementation of USB and multiprotocol

pointing devices.

For applications demanding powerful I/O capabilities, the

Z8E520's input and output lines are grouped into two ports,

and are configurable under software control to provide tim-

ing, status signals, or parallel I/O.

Both 8-bit and 16-bit timers, with a large number of user se-

lectable modes, off-load the system of administering real-

time tasks such as counting/timing and I/O data communi-

cations.

The microcontroller clock frequency is derived from the

system clock by a programmable divider under firmware

control.

The device is capable of functioning in four distinct, select-

able communications modes: PS/2, RS232, GPIO (Gener-

al-purpose I/O), and USB. The communications mode de-

termines the functionality of the two special serial

communications pins (PB6 and PB7). The device is placed

in the required mode when firmware sets the specified

mode bit in the communications control register. The firm-

ware interface is similar in all modes. The same buffer area

in RAM will accept the data to be transmitted. Up to 8 bytes

may be loaded, and the data will actually be transmitted as

soon as the appropriate command is issued (setting In

Packet Ready in USB mode, for example).

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GENERAL DESCRIPTION

(Continued)

Power connections follow conventional descriptions at

right:

Connection

Power

Ground

Circuit

V

CC

Device

V

DD

V

SS

GND

V

CC

GND

Ceramic Resonator

Two 8-bit Timers

or

One 16-bit PWM

Timer

Port B

(6–7)

One 16-bit

Std. Timer

ZIE

Interrupt

Control

Register

Pointer

6 Analog

Comparators

RAM

Register File

(160 Bytes)

ALU

FLAG

Machine Timing

& Inst. Control

6 K Bytes

Prg. Memory

Program

Counter

WDT

Port A

Port B

INTERNAL

RC OSC

I/O

Figure 1. Z8E520 Functional Block Diagram

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Z8E520/C520

1.5 MBPS USB Device Controller

COMMUNICATION MODES

The Z8E520/C520 allows its user to function in a variety of

communication modes. Having this freedom within a sin-

gle chip opens up many possibilities when utilizing multiple

protocol applications. The modes incorporated into the

Z8E520/C520 include PS/2, RS232, GPIO, and USB. A

description of each mode is detailed below.

PS/2 Mode

. The serial baud rate is fixed at 12.5 K baud.

Received data is automatically checked for parity and

framing errors while HOST abort is supported. The serial

communications pins function as PS/2 compatible DATA

(PB6) and CLOCK (PB7).

RS232 Mode.

The data rate is fixed at 1200 baud. The se-

rial communications pins function as RxD (PB6) and TxD

(PB7).

GPIO Mode

. In General-Purpose I/O Mode, the serial

communications pins function as standard I/O pins, with

Input, Output P/P (Push/Pull) and OD (Open Drain) Out-

put.

USB Mode

. The Z8E520 includes two bidirectional end-

points that support communications compliant to the USB

Specification version 1.0. The serial communications pins

function as D– (PB6) and D+ (PB7). The detailed behavior

of the SIE is controllable by the firmware, and three sepa-

rate power states are provided for USB Suspend Mode

support (see section below).

1

USB SUSPEND/RESUME FUNCTIONALITY

Suspend is dedicated through firmware by timing the Ac-

tivity bit which is set by the SIE.

In Stop Mode, with the WDT disabled, power requirements

are minimized. No power is consumed by the voltage reg-

ulator, the Z8

Plus

core, nor differential detector. Only the

Stop Mode Recovery (SMR) is enabled, so an input signal

or Resume from the host can be detected and used to

wake up the microcontroller.

In Stop Mode, with the WDT enabled, slightly more power

is consumed, but the device can wake up periodically to

perform maintenance and detect a change of state in the

application.

USB FUNCTIONAL BLOCK DESCRIPTION

The USB portion of the chip is divided into two areas, the

transceiver and the Serial Interface Engine (SIE). The

transceiver handles incoming differential signals and “sin-

gle ended zero (SE0)”. It also converts output data in digi-

tal form to differential drive at the proper levels (Figure 2).

The SIE performs all other processing on incoming and out

going data, including signal recovery timing, bit stuffing,

validity checking, data sequencing, and handshaking to

the host. Data flow into and out of the MCU portions are

dedicated registers mapped into Expanded Register File

Memory.

The USB SIE handles three endpoints (control at Endpoint

0, data into the host from Endpoint 1 and data out from the

host as Endpoint 2). All communications are at the

1.5 MB/sec data rate. Endpoint 1 and 2 can be combined

as Control EP1.

Figure 2. Data To/From Z8E520/C520

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1.5 MBPS USB Device Controller

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PIN IDENTIFICATION

PA6

PA7

PB0

PB1

PB2

PB3

PB4

PB5

PA0

PA1

1

20

20-Pin

DIP/SOIC

10

11

PA5

PA4

XTAL (2)

GND

XTAL (1)

VCC

PB7

PB6

PA3

PA2

Figure 3. 20-Pin DIP/SOIC Pin Assignments

Table 1. 20-Pin DIP/SOIC Pin Identiﬁcation

STANDARD Mode

Pin #

1, 2

3–8

9–12

13–14

15

16

17

18

19, 20

Symbol

PA X(6,7)

PB X(0–5)

PA X(0–3)

PB X (6–7)

V

cc

XTAL (1)

GND

XTAL (2)

PA X(4,5)

Function

Digital I/O + I SINK

Digital I/O +Comparators

Digital I/O

Digital I/O + Communications

Power

Clock

Power

Clock

Digital I/O + I SINK

Direction

Bidirectional

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Z8E520/C520

1.5 MBPS USB Device Controller

D0

D1

D2

D3

D4

D5

D6

D7

TST_CLR

PGM

1

20

CLK (1 MHz)

GND

(CLK OUT)

VCC

1

20-Pin

DIP/SOIC

10

11

VPP

ADDRCLK

Figure 4. 20-Pin DIP/SOIC Pin Assignments:

EPROM Programming Mode

Table 2. 20-Pin DIP/SOIC Pin Identiﬁcation:

EPROM Programming Mode

EPROM PROGRAMMING Mode

Pin #

1–8

9

10

11

12

13–14

15

16

17

18

19

20

Symbol

D0–D7

TST_CLR

PGM

ADDRCLK

V

PP

V

CC

CLKOUT

GND

CLK

Function

Data Bus

Reset Internal Address Counter

Program Pin

Clock to Address Counter

High Voltage to Program Device

Unused

Power

Output from Clock Inverter

Power Ref

1 MHz to chip

Unused

Direction

I/O

In

Power

Out

Power

In

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Z8C520

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