Z86C27/C97
CPS DC-2974-04
C
USTOMER
P
RODUCT
S
PECIFICATION
Z86C27-ROM
Z86C97-ROM
LESS
CMOS Z8
®
8-B
IT
M
ICROCONTROLLER
GENERAL DESCRIPTION
The Z86C27 and Z86C97 Digital Television Controller
(DTC) introduce a new level of sophistication to single-chip
architecture. The Z86C27/C97 are members of the Z8
single-chip microcontroller family with 8 Kbytes of ROM
(Z86C27), ROMless (Z86C97) and 236 bytes of RAM. Both
devices are housed in a 64-pin DIP package, and are
CMOS compatible. Having the ROM/ROMless selectivity,
the DTC offers both external memory and pre-programmed
ROM which enables the Z8 microcontroller to be used in a
high volume production application device embedded
with a custom program (customer supplied program). The
Z86C97 ROMless offers the use of external memory rather
than a preprogrammed ROM. This enables the Z8
microcontroller to be used in prototyping, low volume
applications or where code flexibility is required. Zilog’s
DTC offers fast execution, efficient use of memory, sophis-
ticated interrupts, input/output bit manipulation capabili-
ties, and easy hardware/software system expansion along
with low cost and low power consumption. The device
provides an ideal performance and reliability solution for
consumer and industrial television applications.
The Z86C27/C97 architecture is characterized by utilizing
Zilog’s advanced Superintegration™ design methodol-
ogy. The devices have an 8-bit internal data path con-
trolled by a Z8 microcontroller, and On Screen Display
(OSD) logic circuits/Pulse Width Modulators (PWM). On-
chip peripherals include two register mapped I/O ports
(Ports 2 and Port 3), Interrupt control logic (1 software, 2
external and 3 internal interrupts) and a standby mode
recovery input port (Port 3, pin P30).
The OSD control circuits support 8 rows by 20 columns for
128 kinds of characters. The character color is specified
by row. One of the 8 rows is assigned to show two kinds of
colors for bar type displays such as volume control. The
OSD is capable of displaying either low resolution (5x7 dot
pattern) or high resolution (11x15 dot pattern) characters.
The Z86C97 currently supports high resolution char-
acters only.
A 14-bit PWM port provides enough voltage resolution for
a voltage synthesizer tuning system. Seven 6-bit PWM
ports are used for controlling audio signal level. Five 8-bit
PWM ports are used to vary picture levels.
The DTC applications demand powerful I/O capabilities.
The Z86C27/C97 fulfills this with 35 I/O pins dedicated to
input and output. These lines are grouped into five ports,
and are configurable under software control to provide
timing, status signals, parallel I/O and an address/data
bus for interfacing to external memory.
There are three basic address spaces available to support
this wide range of configurations: Program Memory, Reg-
ister File and Data Memory. The Register File is composed
of 236 bytes of general purpose register, two I/O Port
registers and 15 control and status registers.
To unburden the program from coping with the real-time
problems such as counting/timing and data communica-
tion, the DTC’s offer two on-chip counter/timers with a large
number of user selectable modes (see block diagram).
Note:
All Signals with a preceding front slash, "/", are active
Low, e.g.: B//W (WORD is active Low); /B/W (BYTE is
active Low, only).
DC-2974-04
(6-10-93)
1
Z86C27/C97
CPS DC-2974-04
ABSOLUTE MAXIMUM RATINGS
Stress greater than those listed under Absolute Maximum
Ratings may cause permanent damage to the device. This
is a stress rating only; operation of the device at any
condition above those indicated in the operational sec-
tions of these specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods
may affect device reliability.
Symbol
V
CC
V
I
V
I
V
O
I
OH
I
OH
I
OL
I
OL
I
OL
T
A
T
STG
Parameters
Power Supply Voltage †
Input Voltage
Input Voltage
Output Voltage
Output Current High
Output Current High
Output Current Low
Output Current Low
Output Current Low,all total
Operating Temperature
Storage Temperature
Min
–0.3
–0.3
–0.3
–0.3
Max
+7
V
CC
+0.3
V
CC
+0.3
V
CC
+8.0
–10
–100
20
40
200
Units
V
V
V
V
mA
mA
mA
mA
mA
C
Notes
[1]
[2]
1 pin
all total
1 pin
[3] (1 pin)
††
–65
+150
Notes:
[1] Port 2 open-drain
[2] PWM open-drain outputs
[3] Port 5
† Voltage on all pins with respect to GND.
†† See Ordering Information
STANDARD TEST CONDITIONS
The characteristics listed below apply for standard test
conditions as noted. All voltages are referenced to GND.
Positive current flows into the referenced pin (see Test
Load Diagram).
From Output
Under Test
VDD
RLL
150 pF
RLH
Test Load Diagram
CAPACITANCE
T
A
=25°C, V
CC
=GND=0 V, Freq=1.0 MHz, unmeasured pins to GND.
Parameter
Input capacitance
Output capacitance
I/O capacitance
AFC
IN
input capacitance
Max
10
20
25
10
Units
pF
pF
pF
pF
4
MCU
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