AS2702
AS-Interface Slave IC
DATA SHEET
General Description
AS2702 (SAP4.1) is a new generation AS-Interface slave
device, which supports AS-Interface bus systems with up to
62 slave modules.
Each slave module is equipped with an AS2702 device,
which interfaces the module to the unshielded 2-wire AS-
Interface bus for serial bidirectional data communication
and power extraction.
Data communication over the AS-Interface takes place in
master slave fashion, which foresees that all slave devices
AS2702 connected to the bus are sequentially and cyclicly
addressed by a single, central master unit. Data on the AS-
Interface bus are Manchester encoded and can be found as
sin2-pulses with a Vpp of between 3V and 8V on top of the
bus’ dc voltage of nominally 30V.
AS2702 regulates the nominal dc bus voltage of 30V
internally
down to 5V to supply it’s internal circuitry
including a 16 x 8 bits EEPROM, as well as down to a
nominal supply level 24V with a max. loading of 35mA for
the actuators and sensors connected to it at the field side.
Each slave device AS2702 may interface to up to 4 sensors
or 3 actuators. An AS-Interface bus system based on
AS2702 may hence link as many as 248 sensors and 186
actuators to a single master unit.
Slave device AS2702 (SAP4.1) is system compatible with
predecessor device AS2701A (ISA3+):
slave modules equipped with AS2702 (SAP4.1) will run in
existing AS-Interface bus systems based on AS2701A
(ISA3+).
The AS-Interface concept is well established as a
standardized digital bus system for industrial automation.
Key Features
•
•
Interface device to connect actuators and sensors to
an AS-Interface bus
Flexible system solution offering 2 package options:
SOIC 20 for full functionality;
SOIC 16 for applications not requiring the
parameter port
DC power extraction from the AS-Interface bus
Serial bidir. data communication with the bus
Data communication watchdog
4-bit bidir. data port plus strobe to poll the sensors and
control the actuators connected
4-bit parameter port plus strobe to provide settings to
the sensors and actuators
24V power supply for the sensors and actuators
Periphery fault input to signal hardware failure of the
sensors and actuators
Integrated 16 x 8 bit EEPROM to store (5 + 1)-bit slave
address and settings
2 LED outputs to optically flag slave unit operation
status
Operating temperature Ta:
- 25°C … + 85°C
Operating supply voltage/bus DC voltage:
typ. 30V
Operating current (Osc. on, outputs idle):
≤
6mA
•
Supply for sensors/actuators:
typ. 24V,
≤
35mA
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AS2702 – AS-Interface Slave IC
Block Diagram
CDC
LTGP
V
LTGP
-6V
+
-
THERMO-
DETECTOR
UOUT
U5R
U5R
U5R
U5R
OSC1
OSCIL-
LATOR
OSC2
RECEIVE
TRANSMIT
JABBER
INHIBIT
RESET
threshold
11
U5R
IMP_POS
IMP_NEG
LTGN
LOGIC BLOCK
POR
BANDGAP
+
-
U5R
16 x 8 BIT
SERIAL E
2
PROM
PFAULT
D0...D3
LED2
LED1
SDA
SCL
4
4
P0...P3
DSTBn
PSTBn
TRIMMING
Figure 1
Block diagram
Pin Assignment and Description
SOIC 20
Pin No.
1
2
3
4
5
6
7
8
9
10
11
12
13
SOIC 16
Pin No.
-
-
1
2
3
4
5
6
7
8
9
10
11
P1
P0
D1
D0
DSTBn
LED1
OSC2
OSC1
U5R
LTGN
LTGP
CDC
UOUT
I/O, digital, pull-up 1, 2
I/O, digital, pull-up 1, 2
I/O, digital
I/O, digital
I/O, digital, pull-up 1
I/O, digital, pull-up 1
O, analog
I, analog
O, power
I, power
I, power
I/O, analog
O, power
Bidir. parameter port bit 1
Bidir. parameter port bit 0
Bidir. data port bit 1
Bidir. data port bit 0
Data port strobe output; reset-input
LED output 1 (IC test input)
Output to quartz crystal
Input from quartz crystal
Nom. 5V power supply output
Neg. supply pin, connected to neg. AS-Interface bus line,
ground reference
Pos. supply pin, connected to pos. AS-Interface bus line
Pin for ext. buffer capacitor
Nom. 24V power supply output
Name
Type
Note
Description
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AS2702 – AS-Interface Slave IC
SOIC 20
14
15
16
17
18
19
20
SOIC 16
12
13
14
15
16
-
-
Name
PFAULT
LED2
PSTBn
D3
D2
P3
P2
Type
I, digital, pull-up
Note
1
Description
Low-active input to flag failure of the sensors/actuators circuitry
connected
LED output 2 (IC test input)
Parameter port strobe output (IC test input)
Bidir. data port bit 3
Bidir. data port bit 2
Bidir. parameter port bit 3
Bidir. parameter port bit 2
I/O, digital, pull-up 1
I/O, digital, pull-up 1
I/O, digital
I/O, digital
I/O, digital, pull-up 1, 2
I/O, digital, pull-up 1, 2
Notes:
1
The pull-up structure is a passive high-side current source with a nom. 10µA current.
2
The passive pull-up current source as per note 1 on these parameter port pins is off, if the slave device is programmed with
I/O-configuration code 7 and a master data call is present.
Functional, Electrical and Timing Characteristics
All voltages are referenced to ground pin LTGN. Timing is valid for a quartz crystal frequency of 5.333MHz.
Absolute Maximum Ratings
Symbol
VLTGP
VCDC
VU5R
IIN
ESD1
ESD2
Tstg
Tbody
Ptot
RTHJA
RTHJA
Parameter
Voltage at the positive supply pin
Voltage at pin for ext. buffer capacitor
Voltage at pins U5R, OSC1, OSC2
Input current at any pin, except for LTGP, CDC
Electrostatic discharge voltage
Electrostatic discharge voltage
Storage temperature
Soldering conditions
Max. power dissipation
Thermal resistance SOIC 16
Thermal resistance SOIC 20
61.2
58.5
Min
-0.3
-0.3
-0.3
-50
1500
300
-55
125
260
1
74.8
71.5
Max
40
VLTGP + 0.3V
7
50
Unit
V
V
V
mA
V
V
V
°C
W
°K/W
°K/W
5)
6)
7)
7)
2)
3)
4)
Note
1)
Notes:
1) 50V during t > 50µs; repetition rate < 0.5Hz
2) Latch-up immunity test. Please observe max. power dissipation allowed
3) Human body model: R = 1.5kOhm; C = 100pF
4) Machine model; applies only for LTGP
5) The reflow peak soldering temperature (body temperature) is specified according IPC/JEDEC J-STD-020C.
6) Free convection, see Figure 2
7) No forced cooling. PCB-surface: 21 cm
2
; still air volume around the device. 10 cm
3
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AS2702 – AS-Interface Slave IC
Pv/ W
1
Pv/ W
1
0.5
0.5
50
100
t/ °C
50
100
t/ °C
SOIC16
Figure 2
Max. acceptable power dissipation relative to ambient temperature
SOIC20
Recommended Operating Conditions
Symbol
VLTGP
ILTG
OA
FC
Parameter
Positive supply voltage/dc portion
Supply current consumption
Ambient temperature
Quartz frequency
Sensitivity against moisture
- 25
25
5.333333
Min
22.5
Nom
Max
34
6
85
Unit
V
mA
°C
MHz
Note
1
2
3
4
5
Notes:
1
False-poling protection diode to be inserted between pos. AS-Interface bus line and LTGP-pin. LTGP-pin to be protected
furthermore with a voltage clamp between LTGP and LTGN.
2
Oscillator on; data transmission stage off; no loads connected
3
Power dissipation restrictions as per Figure 2 to be observed
4
AS-Interface Quartz
5
Level 5 acc. to JEDEC-standard JESD22-A112
Supply Pin LTGP
Positive supply pin connected to positive AS-Interface bus line and clamped relative to neg. supply pin/ground LTGN as described
under Recommended Operating Conditions.
VLTGP and ILTG specified under Recommended Operating Conditions as well.
Symbol
VSIG
Z
Parameter
VPP of sin2-data-pulses on top of dc supply voltage
Input impedance between 50kHz and 300kHz
18
50
Min
3
Nom
Max
8
40
Unit
V
pF
kOhm
mH
CCDC = 100nF
Note
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AS2702 – AS-Interface Slave IC
Buffer Pin CDC
An external buffer capacitor with a recommended value of 100nF should be connected to this pin to ensure a sufficiently high input
impedance Z at power supply pin LTGP.
Voltage at this pin can be as high as VLTGP.
Nom. 24V Power Supply Output UOUT
The supply output voltage at UOUT is directly derived from VLTGP and regulated to a level with an offset of about -6V relative to
VLTGP.
UOUT provides bias to the sensors and actuators circuitry connected to the slave device as well as to the LEDs connected to
outputs LED1 and LED2.
UOUT is equipped with a thermal overload protection, which foresees that VUOUT is switched off as soon as the slave device’s
substrate temperature TJ passes a threshold value in the range of (155
±20)°C.
After TJ has come down and has passed a temperature threshold about (15
±5)°C
lower than (155
±20)°C
and after a consecutive
minimum delay time of 1s has elapsed, VUOUT is switched on again.
Symbol
VUOUT
IUOUT
Parameter
Power supply output voltage
Load current
9.5
10
below which data transmission is inhibited
CUOUT
Buffer capacitor
µF
2
Min
VLTGP - 6.3V
Max
VLTGP - 5.3V
50
10.5
Unit
V
mA
V
1
Note
VCOMOFF UOUT voltage level
Notes:
1
In case IUOUT >40mA and presence of sin2-data pulses on LTGP with VSIG >3V, VUOUT may drop as much as 1V below it’s
level in unloaded condition
2
Electrolytic and rf filter capacitor in parallel
Nom. 5V Power Supply Output U5R
The voltage at U5R is derived from the voltage present at UOUT, as long as UOUT is not switched off due to overload. In the latter
case U5R is derived from an alternative voltage out of the UOUT voltage regulator, which is more or less similar to VUOUT in non
switched off condition of UOUT. As a result VU5R is not affected by overload condition at UOUT and will remain.
Symbol
VU5R
IU5R
CU5R
Parameter
Power supply output voltage
Load current
Buffer capacitor
470
Min
4.85
Max
5.15
1
Unit
V
mA
nF
Oscillator Pins OSC1 and OSC2
The only component to be connected to these pins is a quartz crystal with a resonance frequency of 5.333333 MHz (AS-Interface
quartz crystal).
Symbol
CX2
Parameter
Stray capacitance
Min
Max
10
Unit
pF
Revision 1.3, 21-Aug-08
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