Second Breakdown Collector Current with base forward biased
(V
CE
= 20 V, t = 1 s)
(V
CE
= 140 V, t = 1 s)
Emitter−Cutoff Current
(V
EB
= 5 V)
Emitter−Base Reverse Voltage
(I
E
= 50 mA)
Collector−Emitter Cutoff Current
(V
CE
= 200 V)
Collector Cutoff Current at Reverse Bias
(V
CE
= 300 V, V
BE
= −1.5 V)
(V
CE
= 300 V, V
BE
= −1.5 V, T
C
= 125_C)
Collector−Emitter Sustaining Voltage
(I
C
= 200 mA, I
B
= 0, L = 25 mH)
Characteristic
1.0
0.2
DERATING FACTOR
0.4
0.6
0.8
0
(I
C
= 20 A, I
B1
= I
B2
= 2.5 A,
V
CC
= 100 V, R
C
= 5
W)
40
Figure 1. Power Derating
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T
C
, TEMPERATURE (°C)
80
BUV22
2
120
160
V
CEO(sus)
Symbol
V
CE(sat)
V
BE(sat)
V
EBO
I
CEO
I
EBO
I
CEX
h
FE
I
S/b
t
on
f
T
t
s
t
f
200
12
0.15
Min
250
8.0
20
10
7
3.0
12.0
0.35
Max
2.0
0.8
1.5
1.0
1.5
1.0
3.0
60
mAdc
mAdc
mAdc
MHz
Unit
Vdc
Vdc
Adc
Vdc
ms
V
BUV22
There are two limitations on the power handling ability of
a transistor: average junction temperature and second
breakdown. Safe operating area curves indicate I
C
− V
CE
limits of the transistor that must be observed for reliable
operation i.e., the transistor must not be subjected to greater
dissipation than the curves indicate.
The data of Figure 2 is based on T
C
= 25_C; T
J(pk)
is
variable depending on power level. Second breakdown
limitations do not derate the same as thermal limitations.
At high case temperatures, thermal limitations will reduce
the power that can handled to values less than the limitations
imposed by second breakdown.
1
10
100
250
V
CE
, COLLECTOR−EMITTER VOLTAGE (V)
40
IC, COLLECTOR CURRENT (A)
10
1
0.1
Figure 2. Active Region Safe Operating Area
2.0
I
C
/I
B
= 8
1.6
V, VOLTAGE (V)
1.2
0.8
0.4
0
V
BE
50
45
40
35
30
25
20
15
10
5
V
CE
= 5 V
V
CE
1
10
I
C
, COLLECTOR CURRENT (A)
0
0.1
1
10
100
I
C
, COLLECTOR CURRENT (A)
Figure 3. “On” Voltages
Figure 4. DC Current Gain
t, TIME (
μ
s)
3.0
2.0
1.0
0.4
0.3
0.2
4
8
12
16
t
S
R
C
I
B2
I
B1
R
B
V
CC
10
4
mF
t
on
t
F
20
24
V
CC
=
R
C
=
R
B
=
I
B1
=
I
C
/I
B
=
100 V
5
W
2.7
W
I
B2
8
R
C
− R
B
: Non inductive resistances
I
C
, COLLECTOR CURRENT (A)
Figure 5. Resistive Switching Performance
Figure 6. Switching Times Test Circuit
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3
BUV22
PACKAGE DIMENSIONS
TO−204 (TO−3)
CASE 197A−05
ISSUE K
A
N
C
−T−
E
D
2 PL
SEATING
PLANE
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
INCHES
MIN
MAX
1.530 REF
0.990 1.050
0.250 0.335
0.057 0.063
0.060 0.070
0.430 BSC
0.215 BSC
0.440 0.480
0.665 BSC
0.760 0.830
0.151 0.165
1.187 BSC
0.131 0.188
MILLIMETERS
MIN MAX
38.86 REF
25.15 26.67
6.35
8.51
1.45
1.60
1.53
1.77
10.92 BSC
5.46 BSC
11.18 12.19
16.89 BSC
19.31 21.08
3.84
4.19
30.15 BSC
3.33
4.77
K
M
0.30 (0.012)
T Q
M
Y
M
U
V
2
L
G
−Y−
H
B
DIM
A
B
C
D
E
G
H
K
L
N
Q
U
V
1
−Q−
0.25 (0.010)
M
T Y
M
SWITCHMODE is a trademark of Semiconductor Components Industries, LLC.
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