Quad Channel, 16-Bit, Serial Input,
4 mA to 20 mA and Voltage Output DAC,
Dynamic Power Control
Data Sheet
FEATURES
16-bit resolution and monotonicity
Dynamic power control for thermal management
Current and voltage output pins connectable to a single
terminal
Current output ranges: 0 mA to 20 mA, 4 mA to 20 mA,
or 0 mA to 24 mA
±0.05% total unadjusted error (TUE) maximum
Voltage output ranges (with 20% overrange): 0 V to 5 V, 0 V
to 10 V, ±5 V, and ±10 V
±0.04% total unadjusted error (TUE) maximum
User programmable offset and gain
On-chip diagnostics
On-chip reference (±10 ppm/°C maximum)
−40°C to +105°C temperature range
AD5755
On-chip dynamic power control minimizes package power
dissipation in current mode. This is achieved by regulating the
voltage on the output driver from 7.4 V to 29.5 V using a dc-to-
dc boost converter optimized for minimum on chip power
dissipation.
The part uses a versatile 3-wire serial interface that operates at
clock rates of up to 30 MHz and is compatible with standard
SPI, QSPI™, MICROWIRE™, DSP, and microcontroller inter-
face standards. The interface also features optional CRC-8
packet error checking, as well as a watchdog timer that
monitors activity on the interface.
PRODUCT HIGHLIGHTS
1.
2.
3.
Dynamic power control for thermal management.
16-bit performance.
Multichannel.
APPLICATIONS
Process control
Actuator control
PLCs
COMPANION PRODUCTS
Product Family:
AD5755-1, AD5757
External References:
ADR445, ADR02
Digital Isolators:
ADuM1410, ADuM1411
Power:
ADP2302, ADP2303
Additional companion products on the
AD5755 product page
GENERAL DESCRIPTION
The AD5755 is a quad, voltage and current output DAC that
operates with a power supply range from −26.4 V to +33 V.
FUNCTIONAL BLOCK DIAGRAM
AV
CC
5.0V
AV
SS
–15V
AGND
AV
DD
+15V
SW
x
V
BOOST_x
DV
DD
DGND
LDAC
SCLK
SDIN
SYNC
SDO
CLEAR
FAULT
ALERT
AD1
AD0
DAC CHANNEL A
REFOUT
REFERENCE
REFIN
DAC CHANNEL B
DAC CHANNEL C
GAIN REG A
OFFSET REG A
DIGITAL
INTERFACE
+
DAC A
DC-TO-DC
CONVERTER
7.4V TO 29.5V
I
OUT_x
CURRENT AND
VOLTAGE
OUTPUT RANGE
SCALING
R
SET_x
+V
SENSE_x
V
OUT_x
–V
SENSE_x
AD5755
DAC CHANNEL D
NOTES
1. x = A, B, C, AND D.
Figure 1.
Rev. C
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Trademarks and registered trademarks are the property of their respective owners.
07304-100
AD5755
TABLE OF CONTENTS
Features .............................................................................................. 1
Applications ....................................................................................... 1
General Description ......................................................................... 1
Product Highlights ........................................................................... 1
Companion Products ....................................................................... 1
Functional Block Diagram .............................................................. 1
Revision History ............................................................................... 3
Detailed Functional Block Diagram .............................................. 4
Specifications..................................................................................... 5
AC Performance Characteristics ................................................ 8
Timing Characteristics ................................................................ 9
Absolute Maximum Ratings .......................................................... 12
ESD Caution ................................................................................ 12
Pin Configuration and Function Descriptions ........................... 13
Typical Performance Characteristics ........................................... 16
Voltage Outputs .......................................................................... 16
Current Outputs ......................................................................... 20
DC-to-DC Block......................................................................... 24
Reference ..................................................................................... 25
General ......................................................................................... 26
Terminology .................................................................................... 27
Theory of Operation ...................................................................... 29
DAC Architecture ....................................................................... 29
Power-On State of AD5755 ....................................................... 29
Serial Interface ............................................................................ 30
Transfer Function ....................................................................... 30
Registers ........................................................................................... 31
Programming Sequence to Write/Enable the Output
Correctly ...................................................................................... 32
Changing and Reprogramming the Range ............................. 32
Data Sheet
Data Registers ............................................................................. 33
Control Registers ........................................................................ 35
Readback Operation .................................................................. 38
Device Features ............................................................................... 40
Output Fault ................................................................................ 40
Voltage Output Short-Circuit Protection ................................ 40
Digital Offset and Gain Control ............................................... 40
Status Readback During a Write .............................................. 40
Asynchronous Clear................................................................... 41
Packet Error Checking ............................................................... 41
Watchdog Timer ......................................................................... 41
Output Alert ................................................................................ 41
Internal Reference ...................................................................... 41
External Current Setting Resistor ............................................ 41
Digital Slew Rate Control .......................................................... 42
Power Dissipation control ......................................................... 42
DC-to-DC Converters ............................................................... 42
AI
cc
Supply Requirements—Static ............................................ 44
AI
CC
Supply Requirements—Slewing ...................................... 44
Applications Information .............................................................. 46
Voltage and Current Output Ranges on the Same Terminal . 46
Current Output Mode with Internal R
SET
................................ 46
Precision Voltage Reference Selection ..................................... 46
Driving Inductive Loads............................................................ 47
Transient Voltage Protection .................................................... 47
Microprocessor Interfacing ....................................................... 47
Layout Guidelines....................................................................... 47
Galvanically Isolated Interface ................................................. 48
Outline Dimensions ....................................................................... 49
Ordering Guide .......................................................................... 49
Rev. C | Page 2 of 52
Data Sheet
REVISION HISTORY
1/13—Rev. B to Rev. C
Changes to Figure 2........................................................................... 4
Changed Thermal Impedance from 20°C/W to 28°C/W ..........12
Changes to Pin 6 Description, Table 5..........................................13
Changes to Figure 25 ......................................................................18
Changes to Bit DUT_AD1, DUT_AD0 Description, Table 9 ...33
Changes to Packet Error Checking Section .................................41
Changes to Figure 79 ......................................................................43
Changes to Figure 84 ......................................................................47
Updated Outline Dimensions ........................................................49
Changes to Ordering Guide ...........................................................49
5/12—Rev. A to Rev. B
Changes to Figure 2........................................................................... 4
Changes to Figure 21 ......................................................................18
Changes to Figure 43 ......................................................................22
Changes to Internal Reference Section ........................................41
11/11—Rev. 0 to Rev. A
Changes to Figure 2........................................................................... 4
Changes to Table 1 ............................................................................ 5
Added Timing Diagram heading and changes to Figure 5 ........10
AD5755
Changes to Figure 6 ........................................................................ 11
Changes to Table 5 .......................................................................... 13
Changes to Figure 13 ...................................................................... 16
Changes to Figure 21 ...................................................................... 18
Changes to Figure 37 ...................................................................... 20
Changes to Figure 44 ...................................................................... 22
Changes to Figure 56 and Figure 58 ............................................. 24
Changes to Figure 71 ...................................................................... 29
Changes to Power-On State of AD5575 Section ......................... 29
Changes to Table 17 ........................................................................ 35
Changes to Readback Operation Section and changes to
Table 26 ............................................................................................. 38
Changes to Voltage Output Short-Circuit Protection Section .. 40
Changes to Figure 78 ...................................................................... 41
Changes to Figure 81 through Figure 84 Captions ..................... 44
Changes to Transient Voltage Protection Section and changes to
Figure 85 ........................................................................................... 47
Changes to Galvanically Isolated Interface Section .................... 48
5/11—Revision 0: Initial Version
Rev. C | Page 3 of 52
AD5755
DETAILED FUNCTIONAL BLOCK DIAGRAM
AV
CC
5.0V
AV
SS
–15V
AGND
AV
DD
+15V
SW
A
V
BOOST_A
Data Sheet
DV
DD
DGND
LDAC
CLEAR
SCLK
SDIN
SYNC
SDO
FAULT
POWER-ON
RESET
DC-TO-DC
CONVERTER
POWER
CONTROL
7.4V TO 29.5V V
SEN1
REG
V
SEN2
INPUT
SHIFT
REGISTER
AND
CONTROL
16
INPUT
REG A
+
DAC
REG A
16
R2
DAC A
R3
STATUS
REGISTER
ALERT
WATCHDOG
TIMER
(SPI ACTIVITY)
VREF
REFERENCE
BUFFERS
GAIN REG A
OFFSET REG A
R1
I
OUT_A
R
SET_A
30kΩ
REFOUT
REFIN
VOUT
RANGE
SCALING
DAC CHANNEL A
+V
SENSE_A
V
OUT_A
–V
SENSE_A
I
OUT_B
, I
OUT_C
, I
OUT_D
AD1
AD0
AD5755
DAC CHANNEL B
DAC CHANNEL C
DAC CHANNEL D
V
BOOST_B
, V
BOOST_C
, V
BOOST_D
R
SET_B
, R
SET_C
, R
SET_D
+V
SENSE_B
, +V
SENSE_
C, +V
SENSE_
D
07304-001
V
OUT_B
,
V
OUT_C
,
V
OUT_D
SW
B
, SW
C
, SW
D
Figure 2.
Rev. C | Page 4 of 52
Data Sheet
SPECIFICATIONS
AD5755
AV
DD
= V
BOOST_x
= 15 V; AV
SS
= −15 V; DV
DD
= 2.7 V to 5.5 V; AV
CC
= 4.5 V to 5.5 V; dc-to-dc converter disabled; AGND = DGND =
GNDSW
x
= 0 V; REFIN = 5 V; voltage outputs: R
L
= 1 kΩ, C
L
= 220 pF; current outputs: R
L
= 300 Ω; all specifications T
MIN
to T
MAX
, unless
otherwise noted.
Table 1.
Parameter
1
VOLTAGE OUTPUT
Output Voltage Ranges
Min
0
0
−5
−10
0
0
−6
−12
16
Typ
Max
5
10
+5
+10
6
12
+6
+12
Unit
V
V
V
V
V
V
V
V
Bits
AV
SS
= −15 V, loaded and unloaded
−0.04
−0.03
−0.25
−0.075
−0.006
−0.008
−1
−0.03
+0.04
+0.03
+0.25
+0.075
+0.006
+0.008
+1
+0.03
% FSR
% FSR
% FSR
% FSR
ppm FSR
% FSR
% FSR
LSB
% FSR
ppm
FSR/°C
% FSR
ppm
FSR/°C
% FSR
ppm
FSR/°C
% FSR
ppm
FSR/°C
% FSR
ppm
FSR/°C
V
V
ppm FSR
mA
kΩ
nF
µF
Ω
µV/V
Rev. C | Page 5 of 52
Test Conditions/Comments
Resolution
ACCURACY
Total Unadjusted Error (TUE)
B Version
A Version
TUE Long-Term Stability
Relative Accuracy (INL)
Differential Nonlinearity (DNL)
Zero-Scale Error
Zero-Scale TC
2
Bipolar Zero Error
Bipolar Zero TC
2
Offset Error
Offset TC
2
Gain Error
Gain TC
2
Full-Scale Error
Full-Scale TC
2
OUTPUT CHARACTERISTICS
2
Headroom
Footroom
Output Voltage Drift vs. Time
Short-Circuit Current
Load
Capacitive Load Stability
±0.0032
±0.02
35
±0.0012
±0.0012
±0.002
±2
±0.002
±1
±0.002
±2
±0.004
±3
±0.002
±2
T
A
= 25°C
T
A
= 25°C
Drift after 1000 hours, T
J
= 150°C
0 V to 5 V, 0 V to 10 V, ±5 V, ±10 V ranges
On overranges
Guaranteed monotonic
−0.03
+0.03
−0.03
+0.03
−0.03
+0.03
−0.03
+0.03
1
1
20
12/6
1
16/8
2.2
1.4
With respect to V
BOOST
supply
With respect to the AV
SS
supply
Drift after 1000 hours, ¾ scale output, T
J
= 150°C,
AV
SS
= −15 V
Programmable by user, defaults to 16 mA typical
level
For specified performance
External compensation capacitor of 220 pF
connected
10
2
0.06
50
DC Output Impedance
DC PSRR
Embedded System
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