MT49H16M36BM-18IT datasheet, PDF

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MT49H16M36BM-18IT: DescriptionDDR DRAM, 16MX36, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, MICRO, BGA-144; Categorystorage storage; File Size3MB，78 Pages; ManufacturerMicron Technology; Websitehttp://www.mdtic.com.tw/; Environmental Compliance

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MT49H16M36BM-18IT Overview

DDR DRAM, 16MX36, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, MICRO, BGA-144

MT49H16M36BM-18IT Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	Micron Technology
Parts packaging code	BGA
package instruction	VBGA,
Contacts	144
Reach Compliance Code	compliant
ECCN code	EAR99
access mode	MULTI BANK PAGE BURST
Other features	AUTO/SELF REFRESH
JESD-30 code	R-PBGA-B144
JESD-609 code	e1
length	18.5 mm
memory density	603979776 bit
Memory IC Type	DDR DRAM
memory width	36
Number of functions	1
Number of ports	1
Number of terminals	144
word count	16777216 words
character code	16000000
Operating mode	SYNCHRONOUS
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
organize	16MX36
Package body material	PLASTIC/EPOXY
encapsulated code	VBGA
Package shape	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)	260
Certification status	Not Qualified
Maximum seat height	0.93 mm
self refresh	YES
Maximum supply voltage (Vsup)	1.9 V
Minimum supply voltage (Vsup)	1.7 V
Nominal supply voltage (Vsup)	1.8 V
surface mount	YES
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)
Terminal form	BALL
Terminal pitch	1 mm
Terminal location	BOTTOM
Maximum time at peak reflow temperature	30
width	11 mm

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Features

CIO

RLDRAM

MT49H64M9 – 64 Meg x 9 x 8 Banks

MT49H32M18 – 32 Meg x 18 x 8 Banks

MT49H16M36 – 16 Meg x 36 x 8 Banks

Features

• 533 MHz DDR operation (1.067 Gb/s/pin data rate)

• 38.4 Gb/s peak bandwidth (x36 at 533 MHz clock

frequency)

• Organization

–

64 Meg x 9, 32 Meg x 18, and 16 Meg x 36 I/O

–

8 banks

• Reduced cycle time (15ns at 533 MHz)

• Nonmultiplexed addresses (address multiplexing

option available)

• SRAM-type interface

• Programmable READ latency (RL), row cycle time,

and burst sequence length

• Balanced READ and WRITE latencies in order to

optimize data bus utilization

• Data mask for WRITE commands

• Differential input clocks (CK, CK#)

• Differential input data clocks (DKx, DKx#)

• On-die DLL generates CK edge-aligned data and

output data clock signals

• Data valid signal (QVLD)

• 32ms refresh (16K refresh for each bank; 128K refresh

command must be issued in total each 32ms)

• 144-ball µBGA package

• HSTL I/O (1.5V or 1.8V nominal)

• 25–60 matched impedance outputs

• 2.5V V

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DDQ

I/O

• On-die termination (ODT) R

Options

• Clock cycle timing

–

1.875ns @

RC = 15ns

–

2.5ns @

RC = 15ns

–

2.5ns @

RC = 20ns

–

3.3ns @

RC = 20ns

• Configuration

–

64 Meg x 9

–

32 Meg x 18

–

16 Meg x 36

• Operating temperature

–

Commercial (0° to +95°C)

–

Industrial (T

= –40°C to +95°C;

= –40°C to +85°C)

• Package

–

144-ball µBGA

–

144-ball µBGA (Pb-free)

Marking

-18

-25E

-25

-33

64M9

32M18

16M36

None

• Revision

:A/:B

Notes: 1. Not all options listed can be combined to

define an offered product. Use the part cata-

log search on

www.micron.com

for available

offerings.

PDF: 09005aef80fe62fb/Source: 09005aef809f284b

576Mb_RLDRAM_2_CIO_D1.fm - Rev. J 10/12 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

Products and specifications discussed herein are subject to change by Micron without notice.

576Mb: x9, x18, x36 2.5V V

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Table of Contents

Features . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .1

BGA Part Marking Decoder . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .6

State Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

Functional Block Diagrams. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

Ball Assignments and Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

Package Dimensions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

Electrical Specifications – I

DD . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Electrical Specifications – AC and DC. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

AC and DC Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Input Slew Rate Derating . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .22

Notes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .28

Temperature and Thermal Impedance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Revision History – 576Mb . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .31

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

MODE REGISTER SET (MRS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .34

WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

AUTO REFRESH (AREF) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

Operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

INITIALIZATION . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .43

WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51

AUTO REFRESH . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57

On-Die Termination . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

Multiplexed Address Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

IEEE 1149.1 Serial Boundary Scan (JTAG) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

Disabling the JTAG Feature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

Test Access Port (TAP). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .69

TAP Controller. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .70

Performing a TAP RESET . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72

TAP Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .72

TAP Instruction Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .73

PDF: 09005aef80fe62fb/Source: 09005aef809f284b

576Mb_RLDRAM_CIOTOC.fm - Rev. J 10/12 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

576Mb: x9, x18, x36 2.5V V

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List of Figures

Figure 1:

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Figure 10:

Figure 11:

Figure 12:

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Figure 38:

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Figure 40:

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Figure 44:

Figure 45:

576Mb RLDRAM 2 CIO Part Numbers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .2

Simplified State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .7

64 Meg x 9 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .8

32 Meg x 18 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .9

16 Meg x 36 Functional Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .10

144-Ball µBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .15

Clock Input. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Nominal tAS/tCS/tDS and tAH/tCH/tDH Slew Rate . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

Example Temperature Test Point Location . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

Mode Register Definition in Nonmultiplexed Address Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .35

Read Burst Lengths. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

On-Die Termination-Equivalent Circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

WRITE Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .40

READ Command. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .41

AUTO REFRESH Command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .42

Power-Up/Initialization Sequence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .44

Power-Up/Initialization Flow Chart. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .45

WRITE Burst. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .46

Consecutive WRITE-to-WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .47

WRITE-to-READ . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .48

WRITE-to-READ (Separated by Two NOPs) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .49

WRITE – DM Operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .50

Basic READ Burst Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .51

Consecutive READ Bursts (BL = 2) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

Consecutive READ Bursts (BL = 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .52

READ-to-WRITE . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .53

Read Data Valid Window for x9 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .54

Read Data Valid Window for x18 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .55

Read Data Valid Window for x36 Device . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .56

AUTO REFRESH Cycle . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .57

READ Burst with ODT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .58

READ-NOP-READ with ODT . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .59

Command Description in Multiplexed Address Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .60

Power-Up/Initialization Sequence in Multiplexed Address Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . .61

Mode Register Definition in Multiplexed Address Mode. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .62

BURST REFRESH Operation with Multiplexed Addressing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .64

Consecutive WRITE Bursts with Multiplexed Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .65

WRITE-to-READ with Multiplexed Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .66

Consecutive READ Bursts with Multiplexed Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .67

READ-to-WRITE with Multiplexed Addressing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .68

TAP Controller State Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71

TAP Controller Block Diagram. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .71

JTAG Operation – Loading Instruction Code and Shifting Out Data. . . . . . . . . . . . . . . . . . . . . . . . . . . .74

TAP Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75

PDF: 09005aef80fe62fb/Source: 09005aef809f284b

576Mb_RLDRAM_CIOLOF.fm - Rev. J 10/12 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

576Mb: x9, x18, x36 2.5V V

EXT

, 1.8V V

, HSTL, CIO, RLDRAM 2

List of Tables

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Table 30:

64 Meg x 9 Ball Assignments (Top View) 144-Ball µBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .11

32 Meg x 18 Ball Assignments (Top View) 144-Ball µBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .12

16 Meg x 36 Ball Assignments (Top View) 144-Ball µBGA . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .13

Ball Descriptions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .14

Operating Conditions and Maximum Limits – Rev. A . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .16

Operating Conditions and Maximum Limits – Rev. B. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .17

Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

DC Electrical Characteristics and Operating Conditions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .19

Input AC Logic Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .20

Differential Input Clock Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .21

Address and Command Setup and Hold Derating Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .23

Data Setup and Hold Derating Values . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .24

Capacitance – µBGA. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .25

AC Electrical Characteristics: -18, -25E, -25, -33 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .26

Temperature Limits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .29

Thermal Impedance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .30

Description of Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Command Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .33

Cycle Time and READ/WRITE Latency Configuration Table . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .36

Address Widths at Different Burst Lengths . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .37

On-Die Termination DC Parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .39

576Mb Address Mapping in Multiplexed Address Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .63

Cycle Time and READ/WRITE Latency Configuration Table in Multiplexed Mode . . . . . . . . . . . . . .64

TAP Input AC Logic Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75

TAP AC Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .75

TAP DC Electrical Characteristics and Operating Conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76

Identification Register Definitions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76

Scan Register Sizes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .76

Instruction Codes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

Boundary Scan (Exit) Order . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .77

PDF: 09005aef80fe62fb/Source: 09005aef809f284b

576Mb_RLDRAM_CIOLOT.fm - Rev. J 10/12 EN

Micron Technology, Inc., reserves the right to change products or specifications without notice.

MT49H16M36BM-18IT Related Products

	MT49H16M36BM-18IT	MT49H32M18FM-25E:B	MT49H16M36FM-25:B	MT49H16M36BM-18:B	MT49H16M36BM-25IT	MT49H16M36BM-25E:B	MT49H64M9CBM-25E:B
Description	DDR DRAM, 16MX36, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, MICRO, BGA-144	DDR DRAM, 32MX18, 15ns, CMOS, PBGA144, UBGA-144	DDR DRAM, 16MX36, 20ns, CMOS, PBGA144, UBGA-144	DDR DRAM, 16MX36, 15ns, CMOS, PBGA144, LEAD FREE, UBGA-144	DDR DRAM, 16MX36, CMOS, PBGA144, 11 X 18.50 MM, LEAD FREE, MICRO, BGA-144	DDR DRAM, 16MX36, 15ns, CMOS, PBGA144, LEAD FREE, UBGA-144	DDR DRAM, 64MX9, 15ns, CMOS, PBGA144, LEAD FREE, UBGA-144
Is it Rohs certified?	conform to	incompatible	incompatible	conform to	conform to	conform to	conform to
Maker	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology	Micron Technology
Parts packaging code	BGA	BGA	BGA	BGA	BGA	BGA	BGA
package instruction	VBGA,	UBGA-144	UBGA-144	LEAD FREE, UBGA-144	VBGA,	LEAD FREE, UBGA-144	LEAD FREE, UBGA-144
Contacts	144	144	144	144	144	144	144
Reach Compliance Code	compliant	not_compliant	not_compliant	compliant	compliant	compliant	compliant
ECCN code	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99	EAR99
access mode	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST	MULTI BANK PAGE BURST
Other features	AUTO/SELF REFRESH	AUTO REFRESH	AUTO REFRESH	AUTO REFRESH	AUTO/SELF REFRESH	AUTO REFRESH	AUTO REFRESH
JESD-30 code	R-PBGA-B144	R-PBGA-B144	R-PBGA-B144	R-PBGA-B144	R-PBGA-B144	R-PBGA-B144	R-PBGA-B144
JESD-609 code	e1	e0	e0	e1	e1	e1	e1
length	18.5 mm	18.5 mm	18.5 mm	18.5 mm	18.5 mm	18.5 mm	18.5 mm
memory density	603979776 bit	603979776 bit	603979776 bit	603979776 bit	603979776 bit	603979776 bit	603979776 bit
Memory IC Type	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM	DDR DRAM
memory width	36	18	36	36	36	36	9
Number of functions	1	1	1	1	1	1	1
Number of ports	1	1	1	1	1	1	1
Number of terminals	144	144	144	144	144	144	144
word count	16777216 words	33554432 words	16777216 words	16777216 words	16777216 words	16777216 words	67108864 words
character code	16000000	32000000	16000000	16000000	16000000	16000000	64000000
Operating mode	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS	SYNCHRONOUS
Maximum operating temperature	85 °C	70 °C	70 °C	70 °C	85 °C	70 °C	85 °C
organize	16MX36	32MX18	16MX36	16MX36	16MX36	16MX36	64MX9
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	VBGA	TBGA	TBGA	TBGA	VBGA	TBGA	TBGA
Package shape	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR	RECTANGULAR
Package form	GRID ARRAY, VERY THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, VERY THIN PROFILE	GRID ARRAY, THIN PROFILE	GRID ARRAY, THIN PROFILE
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified	Not Qualified
Maximum seat height	0.93 mm	1.2 mm	1.2 mm	1.2 mm	0.93 mm	1.2 mm	1.2 mm
Maximum supply voltage (Vsup)	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage (Vsup)	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage (Vsup)	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS	CMOS
Temperature level	INDUSTRIAL	COMMERCIAL	COMMERCIAL	COMMERCIAL	INDUSTRIAL	COMMERCIAL	OTHER
Terminal form	BALL	BALL	BALL	BALL	BALL	BALL	BALL
Terminal pitch	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm	1 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	11 mm	11 mm	11 mm	11 mm	11 mm	11 mm	11 mm
Peak Reflow Temperature (Celsius)	260	-	-	260	260	NOT SPECIFIED	-
Terminal surface	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Lead/Silver (Sn/Pb/Ag)	Tin/Lead/Silver (Sn/Pb/Ag)	Tin/Silver/Copper (Sn/Ag/Cu)	Tin/Silver/Copper (Sn/Ag/Cu)	-	Tin/Silver/Copper (Sn/Ag/Cu)
Maximum time at peak reflow temperature	30	-	-	30	30	NOT SPECIFIED	-
Maximum access time	-	15 ns	20 ns	15 ns	-	15 ns	15 ns
Maximum clock frequency (fCLK)	-	400 MHz	400 MHz	533 MHz	-	400 MHz	400 MHz
I/O type	-	COMMON	COMMON	COMMON	-	COMMON	SEPARATE
Output characteristics	-	3-STATE	3-STATE	3-STATE	-	3-STATE	3-STATE
Encapsulate equivalent code	-	BGA144,12X18,40/32	BGA144,12X18,40/32	BGA144,12X18,40/32	-	BGA144,12X18,40/32	BGA144,12X18,40/32
power supply	-	1.5/1.8,1.8,2.5 V	1.5/1.8,1.8,2.5 V	1.5/1.8,1.8,2.5 V	-	1.5/1.8,1.8,2.5 V	1.5/1.8,1.8,2.5 V
Continuous burst length	-	2,4,8	2,4,8	2,4,8	-	2,4,8	2,4,8
Maximum standby current	-	0.055 A	0.055 A	0.055 A	-	0.055 A	0.005 A
Maximum slew rate	-	0.655 mA	0.7 mA	0.885 mA	-	0.7 mA	0.655 mA

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