ZXCD1000
HIGH FIDELITY CLASS D AUDIO AMPLIFIER SOLUTION
DESCRIPTION
The ZXCD1000 provides complete control and
modulation functions at the heart of a high efficiency
high performance Class D switching audio amplifier
solution. In combination with Zetex HDMOS MOSFET
devices, the ZXCD1000 provides a high performance
audio amplifier with all the inherent benefits of Class D.
The ZXCD1000 solution uses proprietary circuit design
to realise the true benefits of Class D without the
traditional drawback of poor distortion performance.
The combination of circuit design, magnetic
component choice and layout are essential to realising
these benefits.
The ZXCD1000 reference designs give output powers
up to 100W rms with typical open loop (no feedback)
distortion of less than 0.2% THD + N over the entire
audio frequency range at 90% full output power. This
gives an extremely linear system. The addition of a
minimum amount of feedback (10dB) further reduces
distortion figures to give < 0.1 % THD + N typical at
1kHz.
From an acoustic point of view, even more important
than the figures above, is that the residual distortion is
almost totally free of any crossover artifacts. This
allows the ZXCD1000 to be used in true hi-fi
applications. This lack of crossover distortion, sets the
ZXCD1000 solutions quite apart from most other
presently available low cost solutions, which in general
suffer from severe crossover distortion problems.
FEATURES
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>90% efficiency
4 / 8
Ω
drive capability
Noise Floor -115dB for solution
Flat response 20Hz - 20kHz
High gate drive capability ( 2200pF)
Very low THD + N 0.2% typical full 90% power, full
band ( for the solution)
Distortion v Power
8Ω open loop at 1kHz.
•
Complete absence of crossover artifacts
•
OSC output available for sync in multi-channel
applications
THD + N (%)
10W
1W
5W
•
Available in a 16 pin exposed pad QSOP package
Output Power
APPLICATIONS
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DVD Players
Automotive audio systems
Home Theatre
Multimedia
Wireless speakers
Portable audio
Sub woofer systems
Public Address system
The plot shows Distortion v Power into an 8Ω load at
1kHz. This plot clearly demonstrates the unequalled
performance of the Zetex solution. Typical distortion of
0.05% at 1W can be seen with better than 0.15% at 10W.
Truly world class performance.
ISSUE 2 - APRIL 2002
1
ZXCD1000
ABSOLUTE MAXIMUM RATINGS
Terminal Voltage with respect to GND
VCC
Power Dissipation
Package Thermal Resistance ( ja)
Operating Temperature Range
Maximum Junction Temperature
Storage Temperature Range
20V
1W
54 C/W
-40 C to 70 C
125 C
-50°C to 85 C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device.
These are stress ratings only, and functional operation of the device at these or any other conditions beyond
those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum
conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
TEST CONDITIONS (unless otherwise stated) VCC = 16V, TA = 25 C
SYMBOL
V
CC
I
ss
F
osc
F
osc(tol)
Vol OutA/B
Voh OutA/B
T
Drive
5V5tol
9VA/Btol
Audio A / B
Triangle
A/B
Audio A / B
Triangle
A/B
Osc A / B
PARAMETER
Operating Voltage Range
Operating Quiescent
Current
Switching Frequency
Frequency Tolerance
Low level output voltage
High level output voltage
Output Drive Capability
(OUT A / B Rise/Fall)
Internal Rail Tolerance
Internal Rail Tolerance
Input Impedence
Input Impedence
Bias Level
Bias Level
Amplitude
V
CC
= 12V
V
CC
= 18V, 16V
C
osc
= 330pF
C
osc
= 330pF
No load
No load
Load Capacitance
= 2200pF
1µF Decoupling
1µF Decoupling
5.23
8.32
1.35k
1.35k
2.95
2.95
0.89
7.5
50
5.5
8.75
1.8k
1.8k
3.1
3.1
1.05
5.77
9.18
2.3k
2.3k
3.25
3.25
1.2
V
V
V
150
200
CONDITIONS
LIMITS
MIN
12
UNITS
MAX
18
45
50
250
+/-25
100
V
mA
mA
kHz
%
mV
V
ns
V
V
TYP
16
ISSUE 2 - APRIL 2002
2
ZXCD1000
Pin Connection Diagram
Audio A
Triangle A
Osc A
Dist
Cosc
Osc B
Triangle B
Audio B
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
5V5
Out A
9VA
VCC
9VB
Gnd2
Out B
Gnd
Figure 1
Pin Description
Pin number
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
Pin Name
Audio A
Triangle A
Osc A
Dist
C
osc
Osc B
Triangle B
Audio B
Gnd
OUT B
Gnd2
9VB
VCC
9VA
OUT A
5V5
Pin Description
Audio Input for Channel A
Triangle Input for Channel A
Triangle Output
No connection
External timing capacitor node (to set the switching frequency)
Triangle Output (for slave ZXCD1000 in stereo application)
Triangle Input for Channel B
Audio Input for Channel B
Small Signal GND
Channel B PWM Output to drive external Bridge MOSFETs
Power GND (for Output Drivers)
Internal Supply Rail (Decouple with 1µF Cap)
Input Supply Pin (Max = 18V)
Internal Supply Rail (Decouple with 1µF Cap).
Channel A PWM Output to drive external Bridge MOSFETs
Internal Supply Rail (Decouple with 1µF Cap)
ISSUE 2 - APRIL 2002
3
ZXCD1000
ZXCD1000 Class D controller IC
A functional block diagram of the ZXCD1000 is shown
in Figure 2. The on chip series regulators drop the
external VCC supply (12V-18V) to the approximate 9V
(9VA/9VB) and 5.5V (5V5) supplies required by the
internal circuitry.
A triangular waveform is generated on chip and is
brought out at the OscA and OscB outputs. The
frequency of this is set (to ~200kHz) by an external
capacitor (Cosc) and on chip resistor. The triangular
waveform must be externally AC coupled back into the
ZXCD1000 at the TriangleA and TriangleB inputs.
AC coupling ensures symmetrical operation resulting
in minimal system DC offsets. TriangleA is connected
to one of the inputs of a comparator and TriangleB is
connected to one of the inputs of a second comparator.
The other inputs of these two comparators are
connected to the AudioA and AudioB inputs, which are
anti-phase signals externally derived from the audio
input. The triangular wave is an order higher in
frequency than the audio input (max 20kHz). The
outputs of the comparators toggle every time the
TriangleA/B and the (relatively slow) AudioA/B signals
cross.
4
5
3
6 7
Oscillator & Ramp
Generator
Osc
Buffers
Triangle A
Triangle B
Osc A
Osc B
Cosc
Dist
2
Audio A
1
Audio B
8
V
CC
Internal 5V5
Pre-
Driver
PWM
Comp A
Pre-
Driver
PWM
Comp B
O/P
Driver
Out A
15
Out B
10
O/P
Driver
13
Internal 9V
Gnd
Figure 2.
Functional Block Diagram
Gnd2
9VA
9VB
5V5
14
12
16
9
11
ISSUE 2 - APRIL 2002
4
ZXCD1000
PWM Comparator
Audio A/B
Audio A/B
Triangle A/B
O/P
Triangle A/B
Comparator O/P
(Duty Cycle = 50%)
Figure 3a.
Figure 3b.
Triangle A/B
Audio A/B
Triangle A/B
Audio A/B
O/P
Comparator O/P
(Duty Cycle = 75%)
Comparator O/P
(Duty Cycle = 25%)
Figure 3c.
Figure 3d.
Figures 3a,3b,3c and 3d
The audio input Pulse Width Modulates the comparator output.
With no audio input signal applied, the AudioA/B
inputs are biased at the mid-point of the triangular
wave, and the duty cycle at the output of the
comparators is nominally 50%. As the AudioA/B signal
ascends towards the peak level, the crossing points
with the (higher frequency) triangular wave also
ascend. The comparator monitoring these signals
exhibits a corresponding increase in output duty cycle.
Similarly, as the AudioA/B signal descends, the duty
cycle is correspondingly reduced. Thus the audio input
Pulse Width Modulates the comparator outputs. This
principle is illustrated in Figures 3a, b, c and d. The
comparator outputs are buffered and used to drive the
OutA and OutB outputs. These in turn drive the speaker
load (with the audio information contained in the PWM
signal) via the off chip output bridge and single stage
L-C filter network.
The ramp amplitude is approximately 1V. The AudioA,
AudioB, TriangleA and TriangleB inputs are internally
biased to a DC voltage of approximately VCC/5. The
mid - point DC level of the OscA and OscB triangular
outputs is around 2V. The triangular wave at the Cosc
pin traverses between about 2.7Vand 3.8V and the dist
pin exhibits a roughly square wave from about 1.4V to
2V. (The above voltages may vary in practice and are
included for guidance only).
ISSUE 2 - APRIL 2002
5
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