HM5164805A Series
HM5165805A Series
8388608-word
×
8-bit Dynamic Random Access Memory
ADE-203-458 (Z)
Preliminary
Rev. 0.3
Jan. 22, 1997
Description
The Hitachi HM5164805A Series, HM5165805A Series are CMOS dynamic RAMs organized 8,388,608-
word
×
8-bit. They employ the most advanced CMOS technology for high performance and low power.
The HM5164805A Series, HM5165805A Series offer Extended Data Out (EDO) Page Mode as a high
speed access mode. They have the package variation of standard 400-mil 32-pin plastic SOJ and standard
400-mil 32-pin plastic TSOPII.
Features
•
Single 3.3 V (±0.3 V)
•
High speed
Access time: 50 ns/60 ns/70 ns (max)
•
Low power dissipation
Active mode : TBD/414 mW/360 mW (max) (HM5164805A Series)
: TBD/594 mW/522 mW (max) (HM5165805A Series)
Standby mode : 7.2 mW (max)
: TBD (L-version)
•
EDO page mode capability
•
Refresh cycle
8192
RAS-only
refresh cycles: 64 ms (HM5164805A Series)
4096 CBR/Hidden refresh cycles: 64ms
: 128 ms (L-version)
4096
RAS-only
refresh cycles: 64 ms (HM5165805A Series)
4096 CBR/Hidden refresh cycles: 64ms
: 128 ms (L-version)
Preliminary: This document contains information on a new product. Specifications and information
contained herein are subject to change without notice.
HM5164805A Series, HM5165805A Series
•
4 variations of refresh
RAS-only
refresh
CAS-before-RAS
refresh
Hidden refresh
Self refresh (L-version)
•
Battery backup operation (L-version)
Ordering Information
Type No.
HM5164805AJ-5
HM5164805AJ-6
HM5164805AJ-7
HM5164805ALJ-5
HM5164805ALJ-6
HM5164805ALJ-7
HM5165805AJ-5
HM5165805AJ-6
HM5165805AJ-7
HM5165805ALJ-5
HM5165805ALJ-6
HM5165805ALJ-7
HM5164805ATT-5
HM5164805ATT-6
HM5164805ATT-7
HM5164805ALTT-5
HM5164805ALTT-6
HM5164805ALTT-7
HM5165805ATT-5
HM5165805ATT-6
HM5165805ATT-7
HM5165805ALTT-5
HM5165805ALTT-6
HM5165805ALTT-7
Access time
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
50 ns
60 ns
70 ns
400-mil 32-pin plastic TSOP II
(TTP-32DC)
Package
400-mil 32-pin plastic SOJ
(CP-32DC)
2
HM5164805A Series, HM5165805A Series
Pin Arrangement
HM5164805AJ/ALJ Series
V
SS
I/O7
I/O6
I/O5
I/O4
V
SS
CAS
OE
A12
A11
A10
A9
A8
A7
A6
V
SS
V
CC
I/O0
I/O1
I/O2
I/O3
NC
V
CC
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
HM5164805ATT/ALTT Series
V
SS
I/O7
I/O6
I/O5
I/O4
V
SS
CAS
OE
A12
A11
A10
A9
A8
A7
A6
V
SS
V
CC
I/O0
I/O1
I/O2
I/O3
NC
V
CC
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
(Top view)
(Top view)
Pin Description
Pin name
A0 to A12
Function
Address input
— Row/Refresh address A0 to A12
— Column address
A0 to A9
Data input/Data output
Row address strobe
Column address strobe
Read/Write enable
Output enable
Power supply
Ground
No connection
I/O0 to I/O7
RAS
CAS
WE
OE
V
CC
V
SS
NC
3
HM5164805A Series, HM5165805A Series
Pin Arrangement
HM5165805AJ/ALJ Series
HM5165805ATT/ALTT Series
V
CC
I/O0
I/O1
I/O2
I/O3
NC
V
CC
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
SS
I/O7
I/O6
I/O5
I/O4
V
SS
CAS
OE
NC
A11
A10
A9
A8
A7
A6
V
SS
V
CC
I/O0
I/O1
I/O2
I/O3
NC
V
CC
WE
RAS
A0
A1
A2
A3
A4
A5
V
CC
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
32
31
30
29
28
27
26
25
24
23
22
21
20
19
18
17
V
SS
I/O7
I/O6
I/O5
I/O4
V
SS
CAS
OE
NC
A11
A10
A9
A8
A7
A6
V
SS
(Top view)
(Top view)
Pin Description
Pin name
A0 to A11
Function
Address input
— Row/Refresh address A0 to A11
— Column address
A0 to A10
Data input/Data output
Row address strobe
Column address strobe
Read/Write enable
Output enable
Power supply
Ground
No connection
I/O0 to I/O7
RAS
CAS
WE
OE
V
CC
V
SS
NC
4
DSP and ARM Processors
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