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HYMD232646L8-K

Description
Unbuffered DDR SDRAM DIMM
Categorystorage    storage   
File Size233KB,16 Pages
ManufacturerSK Hynix
Websitehttp://www.hynix.com/eng/
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HYMD232646L8-K Overview

Unbuffered DDR SDRAM DIMM

HYMD232646L8-K Parametric

Parameter NameAttribute value
MakerSK Hynix
Parts packaging codeDIMM
package instructionDIMM, DIMM184
Contacts184
Reach Compliance Codecompli
ECCN codeEAR99
access modeSINGLE BANK PAGE BURST
Maximum access time0.75 ns
Other featuresAUTO/SELF REFRESH
Maximum clock frequency (fCLK)133 MHz
I/O typeCOMMON
JESD-30 codeR-XDMA-N184
memory density2147483648 bi
Memory IC TypeDDR DRAM MODULE
memory width64
Number of functions1
Number of ports1
Number of terminals184
word count33554432 words
character code32000000
Operating modeSYNCHRONOUS
Maximum operating temperature70 °C
Minimum operating temperature
organize32MX64
Output characteristics3-STATE
Package body materialUNSPECIFIED
encapsulated codeDIMM
Encapsulate equivalent codeDIMM184
Package shapeRECTANGULAR
Package formMICROELECTRONIC ASSEMBLY
power supply2.5 V
Certification statusNot Qualified
refresh cycle8192
self refreshYES
Maximum standby current0.16 A
Maximum slew rate2.44 mA
Maximum supply voltage (Vsup)2.7 V
Minimum supply voltage (Vsup)2.3 V
Nominal supply voltage (Vsup)2.5 V
surface mountNO
technologyCMOS
Temperature levelCOMMERCIAL
Terminal formNO LEAD
Terminal pitch1.27 mm
Terminal locationDUAL
32Mx64 bits
Unbuffered DDR SDRAM DIMM
HYMD232646(L)8-K/H/L
DESCRIPTION
Hynix HYMD232646(L)8-K/H/L series is unbuffered 184-pin double data rate Synchronous DRAM Dual In-Line Mem-
ory Modules(DIMMs) which are organized as 32Mx64 high-speed memory arrays. Hynix HYMD232646(L)8-K/H/L
series consists of eight 32Mx8 DDR SDRAM in 400mil TSOP II packages on a 184pin glass-epoxy substrate.Hynix
HYMD232646(L)8-K/H/L series provide a high performance 8-byte interface in 5.25" width form factor of industry stan-
dard. It is suitable for easy interchange and addition.
Hynix HYMD232646(L)8-K/H/L series is designed for high speed of up to 133MHz and offers fully synchronous opera-
tions referenced to both rising and falling edges of differential clock inputs. While all addresses and control inputs are
latched on the rising edges of the clock, Data, Data strobes and Write data masks inputs are sampled on both rising
and falling edges of it. The data paths are internally pipelined and 2-bit prefetched to achieve very high bandwidth. All
input and output voltage levels are compatible with SSTL_2. High speed frequencies, programmable latencies and
burst lengths allow variety of device operation in high performance memory system.
Hynix HYMD232646(L)8-K/H/L series incorporates SPD(serial presence detect). Serial presence detect function is
implemented via a serial 2,048-bit EEPROM. The first 128 bytes of serial PD data are programmed by Hynix to identify
DIMM type, capacity and other the information of DIMM and the last 128 bytes are available to the customer.
FEATURES
256MB (32M x 64) Unbuffered DDR DIMM based on
32Mx8 DDR SDRAM
JEDEC Standard 184-pin dual in-line memory mod-
ule (DIMM)
2.5V +/- 0.2V VDD and VDDQ Power supply
All inputs and outputs are compatible with SSTL_2
interface
Fully differential clock operations (CK & /CK) with
100MHz/125MHz/133MHz
All addresses and control inputs except Data, Data
strobes and Data masks latched on the rising edges
of the clock
Data(DQ), Data strobes and Write masks latched on
both rising and falling edges of the clock
Data inputs on DQS centers when write (centered
DQ)
Data strobes synchronized with output data for read
and input data for write
Programmable CAS Latency 2 / 2.5 supported
Programmable Burst Length 2 / 4 / 8 with both
sequential and interleave mode
tRAS Lock-out function supported
Internal four bank operations with single pulsed RAS
Auto refresh and self refresh supported
8192 refresh cycles / 64ms
ORDERING INFORMATION
Part No.
HYMD232646(L)8-K
HYMD232646(L)8-H
HYMD232646(L)8-L
V
DD
=2.5V
V
DDQ
=2.5V
Power Supply
Clock Frequency
133MHz (*DDR266A)
133MHz (*DDR266B)
100MHz (*DDR200)
Interface
Form Factor
184pin Unbuffered DIMM
5.25 x 1.25 x 0.15 inch
* JEDEC Defined Specifications compliant
SSTL_2
This document is a general product description and is subject to change without notice. Hynix Semiconductor does not assume any
responsibility for use of circuits described. No patent licenses are implied.
Rev. 0.7/Oct. 02
1

HYMD232646L8-K Related Products

HYMD232646L8-K HYMD2326468-H HYMD2326468-L HYMD232646L8-H HYMD232646L8-L
Description Unbuffered DDR SDRAM DIMM Unbuffered DDR SDRAM DIMM Unbuffered DDR SDRAM DIMM Unbuffered DDR SDRAM DIMM Unbuffered DDR SDRAM DIMM
Maker SK Hynix SK Hynix SK Hynix SK Hynix SK Hynix
Parts packaging code DIMM DIMM DIMM DIMM DIMM
package instruction DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184 DIMM, DIMM184
Contacts 184 184 184 184 184
Reach Compliance Code compli unknow unknow compli compli
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99
access mode SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST SINGLE BANK PAGE BURST
Maximum access time 0.75 ns 0.75 ns 0.8 ns 0.75 ns 0.8 ns
Other features AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH AUTO/SELF REFRESH
Maximum clock frequency (fCLK) 133 MHz 133 MHz 100 MHz 133 MHz 100 MHz
I/O type COMMON COMMON COMMON COMMON COMMON
JESD-30 code R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184 R-XDMA-N184
memory density 2147483648 bi 2147483648 bi 2147483648 bi 2147483648 bi 2147483648 bi
Memory IC Type DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE DDR DRAM MODULE
memory width 64 64 64 64 64
Number of functions 1 1 1 1 1
Number of ports 1 1 1 1 1
Number of terminals 184 184 184 184 184
word count 33554432 words 33554432 words 33554432 words 33554432 words 33554432 words
character code 32000000 32000000 32000000 32000000 32000000
Operating mode SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS SYNCHRONOUS
Maximum operating temperature 70 °C 70 °C 70 °C 70 °C 70 °C
organize 32MX64 32MX64 32MX64 32MX64 32MX64
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE 3-STATE
Package body material UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED UNSPECIFIED
encapsulated code DIMM DIMM DIMM DIMM DIMM
Encapsulate equivalent code DIMM184 DIMM184 DIMM184 DIMM184 DIMM184
Package shape RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR RECTANGULAR
Package form MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY MICROELECTRONIC ASSEMBLY
power supply 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified
refresh cycle 8192 8192 8192 8192 8192
self refresh YES YES YES YES YES
Maximum standby current 0.16 A 0.16 A 0.12 A 0.16 A 0.12 A
Maximum slew rate 2.44 mA 2.44 mA 2.24 mA 2.44 mA 2.24 mA
Maximum supply voltage (Vsup) 2.7 V 2.7 V 2.7 V 2.7 V 2.7 V
Minimum supply voltage (Vsup) 2.3 V 2.3 V 2.3 V 2.3 V 2.3 V
Nominal supply voltage (Vsup) 2.5 V 2.5 V 2.5 V 2.5 V 2.5 V
surface mount NO NO NO NO NO
technology CMOS CMOS CMOS CMOS CMOS
Temperature level COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL COMMERCIAL
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 1.27 mm 1.27 mm 1.27 mm 1.27 mm 1.27 mm
Terminal location DUAL DUAL DUAL DUAL DUAL
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