HCPL-9000-500E datasheet, PDF - EEWORLD Datasheet

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HCPL-9000-500E: DescriptionSPECIALTY LOGIC CIRCUIT, PDIP8, 0.300 INCH, ROHS COMPLIANT, DIP-8; Categorylogic logic; File Size314KB，14 Pages; ManufacturerAVAGO; Websitehttp://www.avagotech.com/; Environmental Compliance

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HCPL-9000-500E Overview

SPECIALTY LOGIC CIRCUIT, PDIP8, 0.300 INCH, ROHS COMPLIANT, DIP-8

HCPL-9000-500E Parametric

Parameter Name	Attribute value
Is it lead-free?	Lead free
Is it Rohs certified?	conform to
Maker	AVAGO
Parts packaging code	DIP
package instruction	DIP,
Contacts	8
Reach Compliance Code	compliant
ECCN code	EAR99
Factory Lead Time	17 weeks
Analog Integrated Circuits - Other Types	ANALOG CIRCUIT
JESD-30 code	R-PDIP-T8
JESD-609 code	e3
length	9.58 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	8
Maximum operating temperature	100 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
Certification status	Not Qualified
Maximum seat height	4.699 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	3 V
Nominal supply voltage (Vsup)	3.3 V
surface mount	NO
technology	CMOS
Temperature level	INDUSTRIAL
Terminal surface	Matte Tin (Sn)
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

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HCPL-9000/-0900, -9030/-0930,

HCPL-9031/-0931, -900J/-090J,

HCPL-901J/-091J, -902J/-092J

High Speed Digital Isolators

Data Sheet

Lead (Pb) Free

RoHS 6 fully

compliant

RoHS 6 fully compliant options available;

-xxxE denotes a lead-free product

Description

The HCPL-90xx and HCPL-09xx CMOS digital isolators

feature high speed performance and excellent transient

immunity specifications. The symmetric magnetic

coupling barrier gives these devices a typical pulse width

distortion of 2 ns, a typical propagation delay skew of

4 ns and 100 Mbaud data rate, making them the indus-

try’s fastest digital isolators.

The single channel digital isolators (HCPL-9000/

-0900) features an active-low logic output enable.

The dual channel digital isolators are configured as

unidirectional (HCPL-9030/-0930) and bi-directional

(HCPL-9031/-0931), operating in full duplex mode making

it ideal for digital fieldbus applications.

The quad channel digital isolators are configured as

unidirectional (HCPL-900J/-090J), two channels in one

direction and two channels in opposite direction (HCPL-

901J/-091J), and one channel in one direction and

three channels in opposite direction (HCPL-902J/-092J).

These high channel density make them ideally suited

to isolating data conversion devices, parallel buses and

peripheral interfaces.

They are available in 8-pin PDIP, 8-pin Gull Wing, 8-pin

SOIC packages, and 16–pin SOIC narrow-body and

wide-body packages. They are specified over the tem-

perature range of -40°C to +100°C.

Features

•

+3.3V and +5V TTL/CMOS compatible

•

3 ns max. pulse width distortion

•

6 ns max. propagation delay skew

•

15 ns max. propagation delay

•

High speed: 100 MBd

•

15 kV/µs min. common mode rejection

•

Tri-state output (HCPL-9000/-0900)

•

2500 V RMS isolation

•

UL1577 and IEC 61010-1 approved

Applications

•

Digital fieldbus isolation

•

Multiplexed data transmission

•

Computer peripheral interface

•

High speed digital systems

•

Isolated data interfaces

•

Logic level shifting

CAUTION:

It is advised that normal static precautions be taken in handling and assembly

of this component to prevent damage and/or degradation which may be induced by ESD.

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