LV77D Series 2.5 V
LVDS Clock Oscillators
May 2006
• Pletronics’ LV77D Series is a quartz crystal
controlled precision square wave generator
with an LVDS output.
• The package is designed for high density
surface mount designs.
• Low cost mass produced oscillator.
• Tape and Reel or Tube packaging is available.
•
•
•
•
1 to 250 MHz
5 x 7 mm LCC Ceramic Package
Enable/Disable Function on pad 1
Disable function includes low standby power
mode
• Low Jitter
Pletronics Inc. certifies this device is in accordance with the
RoHS 6/6 (2002/95/EC) and WEEE (2002/96/EC) directives.
Pletronics Inc. guarantees the device does not contain the following:
Cadmium, Hexavalent Chromium, Lead, Mercury, PBB’s, PBDE’s
Weight of the Device: 0.2 grams
Moisture Sensitivity Level: 1 As defined in J-STD-020C
Second Level Interconnect code: e4
Absolute Maximum Ratings:
Parameter
V
CC
Supply Voltage
Vi
Vo
Input Voltage
Output Voltage
Unit
-0.5V to +5.0V
-0.5V to V
CC
+ 0.5V
-0.5V to V
CC
+ 0.5V
Thermal Characteristics
The maximum die or junction temperature is 155
o
C
The thermal resistance junction to board is 30 to 50
o
C/Watt depending on the solder pads, ground plane
and construction of the PCB.
Product informatin is current as of publication date. The product conforms
to specifications per the terms of the Pletronics standard warranty. Production
processsing does not necesarily include testing of all parameters.
Copyright © 2005, 2006, Pletronics Inc.
LV77D Series 2.5 V
LVDS Clock Oscillators
Jan 2006
Part Number:
LV77
45
D
E
W
- 125.0M
-XX
Internal code or blank
Frequency in MHz
Supply Voltage V
CC
W
= 2.5V + 10%
_
Enhanced Specification
E
= Temperature range -40 to 85
o
C
Series Model
Frequency Stability
45
= + 50 ppm
_
44
= + 25 ppm
_
20
= + 20 ppm
_
Series Model
Part Marking:
PLE LV77
FFFFFM
C
YMDXX
or
LV7xywwxx
FFFFFM
CPLE
xx
Legend:
PLE = Pletronics
FFFFFM
= Frequency in MHz
YMD
or yww = Date of Manufacture (year-month-day) or year, week, week
All other marking is internal factory codes
Specifications such as frequency stability, supply voltage and operating temperature range, etc. are not
identified from the marking. External packaging labels and packing list will correctly identify the ordered
Pletronics part number.
www.pletronics.com
425-776-1880
2
LV77D Series 2.5 V
LVDS Clock Oscillators
Jan 2006
Electrical Specification for 2.50V +10% over the specified temperature range
_
Item
Frequency Range
Frequency Accuracy “45"
“44"
“20"
Output Waveform
Output High Level
Output Low Level
Differential Output (V
OD
)
Differential Output Error (dV
OS
)
Output Offset Voltage (V
OS
)
Output Symmetry
Output T
RISE
and T
FALL
Jitter
Vcc Supply Current
Enable/Disable Internal Pull-up
V disable
V enable
Output leakage
Enable
Disable time
Start up time
Operating Temperature Range
Storage Temperature Range
Standby Current I
CC
V
OUT
= V
CC
V
OUT
= 0V
--
0.90
250
--
1.125
1.125
45
300
400
-
-
-
-
50
-
2.0
-10
-10
-
-
-
-
0
-40
-55
-
-
Min
1
-50
-25
-20
Max
250
+50
+25
+20
LVDS
1.60
--
450
50
1.375
1.500
55
700
900
0.15
2.8
63
40
-
0.4
-
+10
+10
10
10
5
3
+70
+85
+125
3
1.5
mA
mA
Kohm
Volts
Volts
uA
uA
nS
nS
mS
mS
o
o
o
Unit
MHz
ppm
Condition
For all supply voltages, load changes, aging for 1
year, shock, vibration and temperatures
Volts
Volts
mVolts
mVolts
Volts
Volts
%
pS
pS
pS RMS
See load circuit
R1 = 50 ohms
> 80 MHz
< 80 MHz
See load circuit
R1 = 50 ohms
Referenced to 50% of amplitude or crossing point
Vth is 20% and 80% of waveform > 80 MHz
Vth is 20% and 80% of waveform < 80 MHz
Measured from 12KHz to 20MHz from Fnominal
Measured from 10Hz to 1MHz from Fnominal
> 80 MHz
< 80 MHz
Includes current of properly
terminated device
To Vcc (equivalent resistance)
Referenced to Ground
Pad 1 low, device disabled
Time for output to reach a logic state
Time for output to reach a high Z state
> 80 MHz
< 80 MHz
Measured from the time
Vcc = 2.2V
C
C
C
Standard Temperature Range
Extended Temperature Range
“E” Option
uA
mA
Pad 1 low, device disabled > 80 MHz
Pad 1 low, device disabled < 80 MHz
Specifications with Pad 1 E/D open circuit
www.pletronics.com
425-776-1880
3
LV77D Series 2.5 V
LVDS Clock Oscillators
Jan 2006
Typical Phase-Noise Response
0
-20
-40
dBc/Hz
-60
-80
-100
-120
-140
-160
10
1,000
100,000
10,000,000
Frequency (Hz)
Load Circuit
Test Waveform
Symmetry
Vhigh
80%
50%
20%
Vlow
Trise
Tfall
Out
Out*
Showing Out Measurement only
www.pletronics.com
425-776-1880
4
LV77D Series 2.5 V
LVDS Clock Oscillators
Jan 2006
Reliability
: Environmental Compliance
Parameter
Mechanical Shock
Vibration
Solderability
Thermal Shock
Condition
MIL-STD-883 Method 2002, Condition B
MIL-STD-883 Method 2007, Condition A
MIL-STD-883 Method 2003
MIL-STD-883 Method 1011, Condition A
ESD Rating
Model
Human Body Model
Charged Device Model
Minimum Voltage
1500
1000
Conditions
MIL-STD-883 Method 3115
JESD 22-C101
Package Labeling
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Courier New
Bar code is 39-Full ASCII
Label is 1" x 2.6" (25.4mm x 66.7mm)
Font is Arial
www.pletronics.com
425-776-1880
5
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