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PALCE22V10H-25PI

Description
EE PLD, 25ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, SKINNY, PLASTIC, DIP-24
CategoryProgrammable logic devices    Programmable logic   
File Size788KB,27 Pages
ManufacturerAMD
Websitehttp://www.amd.com
Download Datasheet Parametric View All

PALCE22V10H-25PI Overview

EE PLD, 25ns, PAL-Type, CMOS, PDIP24, 0.300 INCH, SKINNY, PLASTIC, DIP-24

PALCE22V10H-25PI Parametric

Parameter NameAttribute value
Is it Rohs certified?incompatible
MakerAMD
Parts packaging codeDIP
package instructionDIP, DIP24,.3
Contacts24
Reach Compliance Codeunknown
Other features10 MACROCELLS; REGISTER PRELOAD; SHARED INPUT/CLOCK; 1 EXTERNAL CLOCK
ArchitecturePAL-TYPE
maximum clock frequency33.3 MHz
JESD-30 codeR-PDIP-T24
JESD-609 codee0
length30.734 mm
Dedicated input times11
Number of I/O lines10
Number of entries22
Output times10
Number of product terms132
Number of terminals24
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize11 DEDICATED INPUTS, 10 I/O
Output functionMACROCELL
Package body materialPLASTIC/EPOXY
encapsulated codeDIP
Encapsulate equivalent codeDIP24,.3
Package shapeRECTANGULAR
Package formIN-LINE
Peak Reflow Temperature (Celsius)NOT SPECIFIED
power supply5 V
Programmable logic typeEE PLD
propagation delay25 ns
Certification statusNot Qualified
Maximum seat height5.08 mm
Maximum supply voltage5.5 V
Minimum supply voltage4.5 V
Nominal supply voltage5 V
surface mountNO
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn/Pb)
Terminal formTHROUGH-HOLE
Terminal pitch2.54 mm
Terminal locationDUAL
Maximum time at peak reflow temperatureNOT SPECIFIED
width7.62 mm
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