Serial-in / Parallel-out Driver Series
Serial / Parallel
5-input Driver
BA829
No.09051EAT02
●Description
Serial-in-parallel-out driver is a constant-current output driver with a built-in shift register and a latch circuit to turn on a
maximum of 8 LED by a 5-line interface linked to a microcontroller. Output current value of constant-current can be set up to
a maximum of 300mA.
●Features
1) This product can drive a maximum of 300mA.
2) When the strobe terminal is controlled by the drive timing pulse, current during a period without driving can be reduced.
3) When the data output terminal is used as the next input data, cascade connection becomes possible.
4) Digital ground and power ground are separated.
5) Latch is built in between the shift register and the driver output.
6) Stand-by function is incorporated. (10μA Typ. upon standby)
●Applications
For AV equipment such as, component stereo sets, videos and TV sets, PCs, and control microcontroller mounted equipment.
●Absolute
maximum ratings
Parameter
Power supply voltage
Power dissipation
Input voltage
Output voltage
Operating temperature
Storage temperature
*1 Reduced by 11 mW/C over 25C.
●Thermal
derating curve
1600
Symbol
V
DD
Pd
I
SINK
V
O
Topr
Tstg
Limit
-0.3 to +7.0
1100*
-0.3 to V
CC
15
-25 to +70
-55 to +125
Unit
Pd
〔mW〕
V
mW
V
V
℃
℃
1400
1200
1000
800
600
400
200
0
25
70℃
BA829
Power dissipation
50
75
100
125
150
175
Ambient temperature Ta
〔℃〕
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© 2009 ROHM Co., Ltd. All rights reserved.
1/7
2009.06 - Rev.A
BA829
●Recommended
operating conditions (Topr=-25℃ to +70℃)
Parameter
Power supply
Clock frequency
Power setup time
Clock pulse width
Data setup time
Data hold time
Latch pulse timing 1
Latch pulse timing 2
Latch pulse width
Strobe pulse timing 1
Strobe pulse width
Voltage between L-GND and P-GND
Symbol
V
CC
T
CLK
t
Pset
t
WC
t
Dset
t
Dhold
t
LT1
t
LT2
t
WL
t
ST1
t
ws
V
G
Min.
4.5
-
500
1
300
400
600
250
800
300
3
-
Typ.
5.0
-
-
-
-
-
-
-
-
-
-
-
Max.
5.5
500
-
-
-
-
-
-
-
-
-
0.2
Unit
V
kHz
ns
ns
ns
ns
ns
ns
ns
ns
μs
V
Technical Note
Condition
-
-
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
Fig.4
-
* Electric potential is a difference of L-GND and P-GND. Short-circuit near the power source whenever possible.
However, between L-GND Pin and P-GND Pin, product should be used in a range not exceeding 0.2V.
●Electrical
characteristics (Unless otherwise specified, Ta=25℃,V
CC
=5.0V)
Parameter
Symbol
Min.
Typ.
Max.
Supply current 1
I
cc1
－
10
20
Supply current 2
I
cc2
－
110
158
Supply current 3
I
cc3
－
14
20
Output ON voltage
V
OON
－
0.4
0.6
Output leakage current
I
OOFF
－
10
50
Data transference time
f
CLK
500
－
－
Input high-level voltage
V
IH
2.6
－
－
Input low-level voltage
V
IL
－
－
0.8
Input high-level current
Input low-level current
Out put high-level voltage
Output low-level voltage
Data output transmission delay
Data output transmission delay
Print output transmission delay
Print output transmission delay
Input high-level current
Input low-level current
I
IH1
I
IL1
V
DDH
V
DDL
t
DLH
t
DHL
t
OLH
t
OHL
I
IH2
I
IL2
－
－
2.8
－
－
－
－
－
－
－
0.1
-0.01
3.0
0.3
0.6
0.6
－
－
0.04
0.1
10
-0.1
－
0.4
1.0
2.0
10
10
0.1
10
Unit
μA
mA
mA
V
μA
kHz
V
V
μA
mA
V
V
μs
μs
μs
μs
mA
μA
Condition
PSW“L”
PSW“H”, STB“H”
PSW“H”, STB“L”
I
CCN
=300 mA
V
0
=13.5V
－
－
－
V
1
=3.4V,CLK,LATCH
,DATA,STB
V
1
=0.4V,CLK,LATCH
,DATA,STB
I
DOH
=-400μA
I
DOL
=⊿1.6mA
R
LD
=10kΩ
R
LD
=10kΩ
R
L
=560kΩ560,
V
0
=13.5V
R
L
=560kΩ560,
V
0
=13.5V
V
1
=3.4V,PSW
V
1
=0.4V,PSW
Test Circuit
Fig.1
Fig.1
Fig.1
Fig.1
Fig.1
Fig.1
Fig.2
Fig.2
Fig.1
Fig.1
Fig.1
Fig.1
Fig.4
Fig.4
Fig.4
Fig.4
Fig.1
Fig.1
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© 2009 ROHM Co., Ltd. All rights reserved.
2/7
2009.06 - Rev.A
BA829
●Block
diagram
Technical Note
W
DOFF
V
V
DCH
V
DCL
V
R
L
×8
V
O
A
A
V
OON
V
R
LD
08
CLK
DATA
LATCH
STB
PSW
Do
PGND
PGND
LGND
Vcc
A
I
CC1
½
3
V
CC
Pulse Gen.
Fig.1
CLK
DATA
LATCH
STB
PAW
LGND
V
CC
V
CC
A
I
IIH
I
IIL
V
I
Fig.2
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© 2009 ROHM Co., Ltd. All rights reserved.
01
3/7
2009.06 - Rev.A
BA829
●Block
diagram
01
13
02
12
03
11
04
10
05
9
06
8
07
7
08
6
Technical Note
PGND 14
5
POWER
GND
STB 17
LATCH 18
LATCH
4
V
CC
SHIFT REG
CLK 1
15 LOGIC
GND
3 D
OUT
DATA 16
2 POWER ON
PSW
Fig.3
●Pin
descriptions
PIN No.
Terminal
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
CLK
PSW
D
OUT
V
CC
PGND
O8
O7
O6
O5
O4
O3
O2
O1
PGND
LGND
DATA
STB
LATCH
I/O
I
I
O
-
-
O
O
O
O
O
O
O
O
-
-
I
I
I
GND
GND
Clock input
Power switch
Function
Cascade output
Power supply
GND
Parallel data output
Serial data input
Strobe input , “L” active
Latch input
●Description
of operation
BA829 is configured internally as shown in the logic circuit diagram. Terminals of clock (CLK), data (DATA), latch (LATCH),
strobe (STB), and power switch (PSW) are available as input.
Data input is synchronized with the clock, read serially during the rise time and latched at the rise time edge of the shifted
shift register. Latched data appears on the output terminal of O1-O8 by the strobe input. Pulse width is the same as that of
the strobe input. Data output terminal DOUT, is a terminal used for cascade connection of the IC, where the output of the
final stage of the shift register has appeared, and is connected to the next data input terminal DATA. In this case, when the
clock and the strobe are used in conjunction, output terminal can be increased by 8 bits at a time.
To affect the standby mode, set the power switch to “L”.
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© 2009 ROHM Co., Ltd. All rights reserved.
4/7
2009.06 - Rev.A
BA829
●Timing
chart
½½
PSW
twc
t
P
set
twc
1
CLK
t
D
set
t
D
hold
2
8
9
10
Technical Note
½½
DATA
½½
t
DLH
t
DHL
D
OUT
½½
t
LT1
t
LT2
LATCH
½½
t
WL
t
ST1
STB
t
WL
½½
½½
t
WS
½½
OB
t
DHL
t
DLH
Fig.4
●Interfaces
V
CC
V
CC
V
CC
I
L
I
L
(a) INPUT (CLK , DATA , LATCH , STB)
(b) INPUT (PSW)
(c) OUTPUT (D
OUT
)
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© 2009 ROHM Co., Ltd. All rights reserved.
5/7
2009.06 - Rev.A
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