HN58V256AI Series
256k EEPROM (32-kword
×
8-bit)
Wide Temperature Range version
ADE-203-616C (Z)
Rev. 3.0
Oct. 24, 1997
Description
The Hitachi HN58V256A is electrically erasable and programmable ROM organized as 32768-word
×
8-bit.
It has realized high speed low power consumption and high reliability by employing advanced MNOS
memory technology and CMOS process and circuitry technology. They also have a 64-byte page
programming function to make their write operations faster.
Features
•
Single 3 V supply: 2.7 to 5.5
•
Access time: 120 ns max
•
Power dissipation:
Active: 20 mW/MHz, (typ)
Standby: 110
µW
(max)
•
On-chip latches: address, data,
CE, OE, WE
•
Automatic byte write: 10 ms max
•
Automatic page write (64 bytes): 10 ms max
•
Data
polling and Toggle bit
•
Data protection circuit on power on/off
•
Conforms to JEDEC byte-wide standard
•
Reliable CMOS with MNOS cell technology
•
10
5
erase/write cycles (in page mode)
•
10 years data retention
•
Software data protection
•
Operating temperature range: –40 to 85˚C
HN58V256AI Series
Ordering Information
Type No.
HN58V256AFPI-12
HN58V256ATI-12
Access time
120 ns
120 ns
Package
400 mil 28-pin plastic SOP (FP-28D)
28-pin plastic TSOP (TFP-28DB)
Pin Arrangement
HN58V256AFPI Series
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
1
2
3
4
5
6
7
8
9
10
11
12
13
14
(Top view)
28
27
26
25
24
23
22
21
20
19
18
17
16
15
V
CC
WE
A13
A8
A9
A11
OE
A10
CE
I/O7
I/O6
I/O5
I/O4
I/O3
A2
A1
A0
I/O0
I/O1
I/O2
V
SS
I/O3
I/O4
I/O5
I/O6
I/O7
CE
A10
15
16
17
18
19
20
21
22
23
24
25
26
27
28
(Top view)
HN58V256ATI Series
14
13
12
11
10
9
8
7
6
5
4
3
2
1
A3
A4
A5
A6
A7
A12
A14
V
CC
WE
A13
A8
A9
A11
OE
2
HN58V256AI Series
Pin Description
Pin name
A0 to A14
I/O0 to I/O7
OE
CE
WE
V
CC
V
SS
Function
Address input
Data input/output
Output enable
Chip enable
Write enable
Power supply
Ground
Block Diagram
I/O0
High voltage generator
to
V
CC
V
SS
I/O7
OE
CE
WE
Control logic and timing
I/O buffer
and
input latch
A0
to
Y decoder
Y gating
A5
Address
buffer and
latch
A6
to
X decoder
Memory array
A14
Data latch
3
HN58V256AI Series
Operation Table
Operation
Read
Standby
Write
Deselect
Write inhibit
CE
V
IL
V
IH
V
IL
V
IL
×
×
Data
polling
V
IL
OE
V
IL
×*
2
V
IH
V
IH
×
V
IL
V
IL
WE
V
IH
×
V
IL
V
IH
V
IH
×
V
IH
I/O
Dout
High-Z
Din
High-Z
—
—
Dout (I/O7)
Notes: 1. Refer to the recommended DC operating condition.
2.
×
: Don’t care
Absolute Maximum Ratings
Parameter
Supply voltage relative to V
SS
Input voltage relative to V
SS
Operating temperature range*
2
Storage temperature range
Symbol
V
CC
Vin
Topr
Tstg
Value
–0.6 to +7.0
–0.5*
1
to +7.0*
3
–40 to +85
–55 to +125
Unit
V
V
°C
°C
Notes: 1. Vin min = –3.0 V for pulse width
≤
50 ns
2. Including electrical characteristics and data retention
3. Should not exceed V
CC
+ 1 V.
4
HN58V256AI Series
Recommended DC Operating Conditions
Parameter
Supply voltage
Symbol
V
CC
V
SS
Input voltage
V
IL
V
IH
Operating temperature
Topr
Notes: 1. V
IL
min: –1.0 V for pulse width 50 ns.
2. V
IH
max: V
CC
+ 1.0 V for pulse width 50 ns.
3. V
IH
min: 3.0 V at V
CC
= 3.6 to 5.5V
Min
2.7
0
–0.3*
1
2.4*
3
–40
Typ
3.0
0
—
—
—
Max
5.5
0
0.6
Unit
V
V
V
V
CC
+ 0.3*
2
V
85
°C
DC Characteristics
(Ta = –40 to +85°C, V
CC
= 2.7 to 5.5 V)
Parameter
Input leakage current
Output leakage current
V
CC
current (standby)
Symbol
I
LI
I
LO
I
CC1
I
CC2
V
CC
current (active)
I
CC3
Min
—
—
—
—
—
—
—
—
Output low voltage
Output high voltage
V
OL
V
OH
—
V
CC
×
0.8
Typ
—
—
—
—
—
—
—
—
—
—
Max
2
2
20
1
8
12
15
30
0.4
—
Unit
µA
µA
µA
mA
mA
mA
mA
mA
V
V
Test conditions
V
CC
= 5.5 V, Vin = 5.5 V
V
CC
= 5.5 V, Vout = 5.5/0.4 V
CE
= V
CC
CE
= V
IH
Iout = 0 mA, Duty = 100%,
Cycle = 1 µs at V
CC
= 3.6 V
Iout = 0 mA, Duty = 100%,
Cycle = 1 µs at V
CC
= 5.5 V
Iout = 0 mA, Duty = 100%,
Cycle = 120 ns at V
CC
= 3.6 V
Iout = 0 mA, Duty = 100%,
Cycle = 120 ns at V
CC
= 5.5 V
I
OL
= 2.1 mA
I
OH
= –400 µA
Capacitance
(Ta = 25°C, f = 1 MHz)
Parameter
Input capacitance*
1
Output capacitance*
1
Note:
Symbol
Cin
Cout
Min
—
—
Typ
—
—
Max
6
12
Unit
pF
pF
Test conditions
Vin = 0 V
Vout = 0 V
1. This parameter is periodically sampled and not 100% tested.
5