BU7325HFV
High-performance Clock Generator Series
Compact 1ch Clock Generators
for Digital Cameras
BU3071HFV,BU3072HFV,BU3073HFV,BU3076HFV,BU7322HFV,BU7325HFV
No.09005EAT01
●Description
These Clock Generators incorporates compact package compared to oscillators, which provides the generation of
high-frequency CCD, USB, VIDEO clocks necessary for digital still cameras and digital video cameras.
●Features
1) SEL pin allowing for the selection of frequencies
2) Selection of OE pin enabling Power-down function
3) Crystal-oscillator-level clock precision with high C/N characteristics and low jitter
4) Micro miniature HVSOF6 Package incorporated
5) Single power supply of 3.3 V
●Applications
Digital Still Camera, Digital Video Camera, and others
●Lineup
Parameter
Supply voltage
Operating temperature range
Reference input clock
Output clock
Power-down function
Operating current (Typ.)
Package
BU3071HFV
3.0 V ~ 3.6V
-5℃ ~ 70℃
28.6363MHz
54.0000MHz
-
Provided
10mA
HVSOF6
BU3072HFV
3.0 V ~ 3.6V
-5℃ ~ 70℃
48.0000MHz
27.0000MHz
36.0000MHz
Provided
11mA
HVSOF6
BU3073HFV
-5℃ ~ 70℃
48.0000MHz
24.3750MHz
24.5454MHz
Provided
11mA
HVSOF6
BU3076HFV
-5℃ ~ 75℃
27.0000MHz
54.0000MHz
67.5000MHz
Provided
12mA
HVSOF6
BU7322HFV
-5℃ ~ 75℃
27.0000MHz
49.5000MHz
36.0000MHz
Provided
10mA
HVSOF6
BU7325HFV
-30℃ ~ 85℃
27.0000MHz
48.0000MHz
78.0000MHz
Provided
12mA
HVSOF6
3.0 V ~ 3.6V 2.85 V ~ 3.6V 2.85 V ~ 3.6V 2.85 V ~ 3.6V
●Absolute
Maximum Ratings(Ta=25℃)
Parameter
Symbol
Supply voltage
Input voltage
Storage temperature range
Power dissipation
VDD
VIN
Tstg
Pd
Ratings
-0.3 ~ 4.0
-0.3 ~ VDD+0.3
-30 ~ 125
410
Unit
V
V
℃
mW
*1 Operating is not guaranteed.
*2 In the case of exceeding Ta = 25℃, 4.1mW should be reduced per 1℃.
*3 The radiation-resistance design is not carried out.
*4 Power dissipation is measured when the IC is mounted to the printed circuit board.
●Recommended
Operating Range
Parameter
Symbol
Supply voltage
Input H voltage
Input L voltage
Operating temperature
Output load
VDD
VINH
VINL
Topr
CL
Limits
3.0 ~ 3.6
0.8VDD ~ VDD
0.0 ~ 0.2VDD
-5 ~ 70
15(MAX)
Unit
V
V
V
℃
pF
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© 2009 ROHM Co., Ltd. All rights reserved.
1/21
2009.04 - Rev.A
BU3071HFV,BU3072HFV,BU3073HFV,BU3076HFV,BU7322HFV,BU7325HFV
Technical Note
●Electrical
Characteristics
BU3071HFV(Ta=25℃, VDD=3.3V,Crystal frequency=28.6363MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Consumption current 1
IDD1
-
10
15
mA OE=H, at no load
Consumption current 2
IDD2
-
1
1.3
mA OE=L
Output frequency
-
54.0000
-
MHz IN*264/35/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
50
-
psec
※1
Period-Jitter MIN-MAX
PJsABS
-
300
-
psec
※2
Period of transition time required for the
Rise time
tr
-
2.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
2.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
1
msec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 28.6363MHz, the output frequency will be as listed above.
BU3072HFV(Ta=25℃, VDD=3.3V, Crystal frequency=48.0000MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Consumption current 1
IDD1
-
11
16
mA PD=H, at no load
Consumption current 2
IDD2
-
-
5
µA
PD=L
CLK_27
-
27.0000
-
MHz SEL=L, IN*18/8/4
Output frequency
CLK_36
-
36.0000
-
MHz SEL=H, IN*24/8/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
35
-
psec
※1
Long-Term-Jitter
MIN-MAX of long-term jitter
LTJsABS
-
0.9
1.5
nsec
MIN-MAX
(100 µsec from trigger)
Period of transition time required for the
Rise time
tr
-
2.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
2.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
1
msec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 48.0000MHz, the output frequency will be as listed above.
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© 2009 ROHM Co., Ltd. All rights reserved.
2/21
2009.04 - Rev.A
BU3071HFV,BU3072HFV,BU3073HFV,BU3076HFV,BU7322HFV,BU7325HFV
Technical Note
BU3073HFV(Ta=25℃, VDD=3.3V, Crystal frequency=48.0000MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Consumption current 1
IDD1
-
11
16
mA PD=H, at no load
Consumption current 2
IDD2
-
-
5
mA PD=L
CLK_375
-
24.3750
-
MHz SEL=L, IN*65/16/8
Output frequency
CLK_545
-
24.5454
-
MHz SEL=H, IN*45/11/8
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
45
-
psec
※1
Long-Term-Jitter
MIN-MAX of long-term jitter
LTJsABS
-
0.9
1.5
nsec
MIN-MAX
(100 µsec from trigger)
Period of transition time required for the
Rise time
tr
-
2.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
2.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
1
msec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 48.0000MHz, the output frequency will be as listed above.
BU3076HFV(Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Pull-down resistance
Rpd
25
50
100
KΩ Pull-down resistance on input pin
Consumption current 1
IDD1
-
10
15
mA 54MHz output, at no load
Consumption current 2
IDD2
-
12
18
mA 67.5MHz output, at no load
Standby current
IDDst
-
-
1
µA
OE=L
CLK_54
-
54.0000
-
MHz SEL=L, IN*48/6/4
Output frequency
CLK_67.5
-
67.5000
-
MHz SEL=H, IN*60/6/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
50
-
psec
※1
Period-Jitter MIN-MAX
PJsABS
-
300
-
psec
※2
Period of transition time required for the
Rise time
tr
-
1.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
1.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
200
µsec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
www.rohm.com
© 2009 ROHM Co., Ltd. All rights reserved.
3/21
2009.04 - Rev.A
BU3071HFV,BU3072HFV,BU3073HFV,BU3076HFV,BU7322HFV,BU7325HFV
Technical Note
BU7322HFV(Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Pull-down resistance
Rpd
25
50
100
kΩ
Pull-down resistance on input pin
Consumption current 1
IDD
-
10
13.5
mA 49.5MHz output, at no load
Consumption current 2
IDD2
-
9.5
13.0
mA 36.0MHz output, at no load
Standby current
IDDst
-
-
1
µA
OE=L
CLK_49.5
-
49.5000
-
MHz SEL=L, IN*66/6/6
Output frequency
CLK_36
-
36.0000
-
MHz SEL=H, IN*64/6/8
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
50
-
psec
※1
Period-Jitter MIN-MAX
PJsABS
-
300
-
psec
※2
Period of transition time required for the
Rise time
tr
-
2.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
2.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
200
µsec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
BU7325HFV(Ta=25℃, VDD=3.3V, Crystal frequency=27.0000MHz, unless otherwise specified.)
Limits
Parameter
Symbol
Unit
Conditions
Min.
Typ.
Max.
Output H voltage
VOH
2.8
-
-
V
IOH=-4.0mA
Output L voltage
VOL
-
-
0.5
V
IOL=4.0mA
Pull-down resistance
Rpd
25
50
100
kΩ
Pull-down resistance on input pin
Consumption current 1
IDD1
-
11
15
mA OE=H, SEL=L, at no load
Consumption current 2
IDD2
-
12
16.5
mA OE=H, SEL=H, at no load
Standby current
IDDst
-
-
1
µA
OE=L
CLK_48
-
48.0000
-
MHz SEL=L, IN*96/9/6
Output frequency
CLK_78
-
78.0000
-
MHz SEL=H, IN*104/9/4
The following parameters represent design guaranteed performance.
Duty
Duty
45
50
55
%
Measured at a voltage of 1/2 of VDD
Period-Jitter 1σ
PJsSD
-
50
-
psec
※1
Period-Jitter MIN-MAX
PJsABS
-
300
-
psec
※2
Period of transition time required for the
Rise time
tr
-
1.5
-
nsec output to reach 80% from 20% of VDD.
Provided with 15pF output load.
Period of transition time required for the
Fall time
tf
-
1.5
-
nsec output to reach 20% from 80% of VDD.
Provided with 15pF output load.
Output Lock time
tLOCK
-
-
200
µsec
※3
Note) The output frequency is determined by the arithmetic (frequency division) expression of a frequency input to IN.
If the input frequency is set to 27.0000MHz, the output frequency will be as listed above.
Common to BU3071HFV, BU3072HFV, BU3073HFV, BU3076HFV, BU7322HFV, BU7325HFV
※1
※2
※3
Period-Jitter 1σ
This parameter represents standard deviation (=1σ) on cycle distribution data at the time when the output clock cycles are sampled 1000 times
consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
Period-Jitter MIN-MAX
This parameter represents a maximum distribution width on cycle distribution data at the time when the output clock cycles are sampled 1000 times
consecutively with the TDS7104 Digital Phosphor Oscilloscope of Tektronix Japan, Ltd.
Output Lock Time
This parameter represents elapsed time after power supply turns ON to reach a voltage of 3.0 V, after the system is switched from Power-Down state to
normal operation state, or after the output frequency is switched, until it is stabilized at a specified frequency, respectively.
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© 2009 ROHM Co., Ltd. All rights reserved.
4/21
2009.04 - Rev.A
BU3071HFV,BU3072HFV,BU3073HFV,BU3076HFV,BU7322HFV,BU7325HFV
●Reference
data (BU3071HFV basic data)
RBW:1kHz
VBW:100Hz
Technical Note
1V/div
10dB/div
1V/div
5nsec/div
500psec/div
10kHz/div
Fig.1 54MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.2 54MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.3 54MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
●Reference
data (BU3072HFV basic data)
RBW:1kHz
VBW:100Hz
1V/div
1V/div
10dB/div
10nsec/div
500psec/div
10kHz/div
Fig.4 27MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.5 27MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.6 27MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
RBW:1kHz
VBW:100Hz
1V/div
5nsec/div
1V/div
500psec/div
10dB/div
10kHz/div
Fig.7 36MHz output waveform
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.8 36MHz Period-Jitter
(VDD=3.3V,CL=15pF,Ta=25℃)
Fig.9 36MHz spectrum
(VDD=3.3V,CL=15pF,Ta=25℃)
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© 2009 ROHM Co., Ltd. All rights reserved.
5/21
2009.04 - Rev.A
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