ADVANCE INFORMATION
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI5C16215
Product Features
20-Bit, Hot Insertion, BusSwitch with
Precharged Outputs for Live Insertion
Undershoot protection up to -1.5V, 25ns width
Near zero propagation delay
5Ω switches connect between two ports
Fast switching speed: 4.5ns max.
Permits hot insertion
Isolation during power-off conditions
B-Port outputs are precharged by bias voltage
to minimize signal distortion during live insertion.
Package options include:
- 48-pin 150-mil wide plastic BQSOP (B48)
- 48-pin 240-mil wide plastic TSSOP (A48)
- 48-pin 300-mil wide plastic SSOP (V48)
Product Description
Logic Block Diagram
1
BIASV
1A1
2
SW
46
1B1
Pericom Semiconductors PI5C series of logic circuits are produced
using the companys advanced 0.6 micron CMOS Technology.
The PI5C16215 provides 20-bits of high-speed bus switching. The
low on-state resistance of the switch allows connections to be made
with minimal propagation delay. The device also precharges the B-
port to a user-selectable bias voltage (BIASV) to minimize live-
insertion noise.
The device is organized as dual 10-bit bus switches with individual
output-enable (OE) inputs. When OE is low, the corresponding
10-bit bus switch is on and port A is connected to port B. When OE
is high, the switch is open, a high-impedance state exists between
the two ports, and port B is precharged to BIASV through the
equivalent of a 10-kΩ resistor.
To ensure the high-impedance state on power up or power down,
OE should be tied to Vcc through a pullup resistor; the minimum
value of the resistor is determined by the current-sinking capability
of the driver connected to OE.
1A10
12
SW
36
1B10
Product Pin Configuration
BIASV
1
A
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
O
E
2
O
E
1
B
1
1
B
2
1
B
3
1
B
4
1
B
5
1OE
48
1
A
2
1
A
3
1
A
4
1
A
5
2A1
13
35
SW
2B1
1
A
6
GND
1
A
7
1
A
8
1
A
9
GND
1
B
6
1
B
7
1
B
8
1
B
9
1
B
10
2
B
1
2
B
2
2
B
3
2A10
24
SW
25
2B10
1
A
10
2
A
1
2
A
2
A48
B48
V48
2OE
47
Vcc
2
A
3
GND
2
A
4
2
A
5
A
B
GND
2
B
4
2
B
5
2
B
6
2
B
7
2
B
8
2
B
9
2
B
10
2
A
6
2
A
7
Truth Table
OE
L
H
Function
A port = B port
A port = Z, B Port = BIASV
1
2
A
8
2
A
9
2
A
10
PS8370
12/18/98
ADVANCE INFORMATION
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI5C16215
20-Bit, Hot Insertion, BusSwitch with
Precharged Outputs for Live Insertion
Absolute Maximum Ratings Over Free-Air Temperature Range*
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature ...................................................... 65°C to +150°C
Supply Voltage Range ......................................................... 0.5V to +7V
DC Input Voltage
(1) ........................................................................................
0.5V to +7V
Input Clamp Current, I
IK
(V
1
<0) .................................................... 50mA
DC Output Current ........................................................................ 120 mA
Power Dissipation
(2) ..........................................................................................................
0.5W
Note:
Stresses greater than those listed under MAXIMUM
RATINGS may cause permanent damage to the de-
vice. This is a stress rating only and functional opera-
tion of the device at these or any other conditions
above those indicated in the operational sections of
this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may
affect reliability.
Notes:
1. The input and output negative-voltage ratings may be exceeded if the input and output clamp-current ratings are observed.
2. The maximum package power dissipation is calculated using a junction temperatue of 150°C and a board trace length of 750 mils.
Recommended Operating Conditions
Parameter
V
CC
BIASV
V
IH
V
IL
T
A
Description
Supply voltage
Supply voltage
High-level input voltage
Low-level input voltage
Operating free-air temperature
-40
Min.
4
1.3
2
0.8
85
Max.
5.5
V
CC
Units
V
V
V
V
°C
Electrical Characteristics
(Over Recommended Operating Free-air Temperature Range)
Parame te r
V
IK
I
I
Io
Icc
∆
Icc
E
Ci
Control pins
Control pins
Vcc = 4.5V
Vcc = 5.5V
Vcc = 4.5V
Vcc = 5.5V
V
CC
=3.6V
V
I
=3V or 0
Vo =3V or 0
Vcc = 4V
Ron*
Vcc = 4.5V
Switch O ff
V
I
= 2.4V
V
I
= 0,
V
I
= 0,
V
I
= 2.4V
I
I
= 15mA
I
I
= 64mA
I
I
= 30mA
I
I
= 15mA
Te s t Conditions
I
I
= - 18mA
V
I
= 5.5V or GND
BIASV = 2.4V
Io = 0
Vo = 0
V
I
= Vcc or GND
3.5
4.5
9
5.5
5
9
28
8
8
16
Ω
M in.
Typ
=
M ax.
1.8
±5
0.25
100
2.5
Units
V
µA
mA
µA
mA
pF
O ne input at 3.4V O ther at Vcc or GND
Co(O FF)
Notes:
* Measured by the voltage drop between the A and B terminals at the indicated current through the switch.
On-state resistance is determined by the lower of the voltages of the two (A or B) terminals.
E
This is the increase in supply current for each input that is at the specified TTL voltage level rather the Vcc or GND.
=
All typical values are at Vcc = 5V, T
A
= 25°C.
2
PS8370
12/18/98
ADVANCE INFORMATION
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
21098765432121098765432109876543210987654321210987654321098765432109876543212109876543210987654321098765432121098765432109876543210987654321
PI5C16215
20-Bit, Hot Insertion, BusSwitch with
Precharged Outputs for Live Insertion
Switching Characteristics
(Over Recommended Operating Free-air Temperature Range, C
L
= 50pF)
Parame te r
Te s t Conditions
From (Input)
A or B
BIASV = GND
BIASV = 3V
BIASV = GND
BIASV = 3V
ON
To (Output)
B or A
A or B
3.1
3.6
2.7
3
Vcc = 5V ±0.5V
M in.
M ax.
0.25
5
5
5
5
Vcc = 4V
M in.
M ax.
0.25
6
6
5.5
5.5
ns
Units
t
pd
t
PZH
t
PZL
t
PHZ
t
PLZ
ON
A or B
Notes:
1. This parameter is warranted but not production tested. The propagation delay is based on the RC time constant
of the typical on-state resistance of the switch and a load capacitance of 50pF, when driven by an ideal voltage
source (zero output impedance).
Parameter Measurements
500
From Output
Under Test
CL = 50pF
(See Note 1)
500
ohm
S1
Te s t
7V
Open
GND
S1
Open
7V
Open
3V
1.5V
t
PZL
1.5V
V
OL
+0.3V
t
PZH
1.5V
t
PHZ
V
OH
V
OH
-0.3V
0V
V
OL
t
PLZ
3.5V
1.5V
0V
tpd
t
PLZ
/t
PZL
t
PHZ
/t
PZH
ohm
LOAD CIRCUIT
Output
Control
(Low Level
Enabling)
Output
Waveform 1
S1 at 6V
(see Note 2)
Output
Waveform 2
S1 at Open
(see Note 2)
3V
1.5V
t
PZL
1.5V
V
OL
+0.3V
t
PZH
1.5V
t
PHZ
V
OH
V
OH
-0.3V
0V
V
OL
t
PLZ
3.5V
1.5V
0V
Output
Control
(Low Level
Enabling)
Output
Waveform 1
S1 at 6V
(see Note 2)
Output
Waveform 2
S1 at Open
(see Note 2)
VOLTAGE WAVEFORMS
PROPAGATION DELAY TIMES
VOLTAGE WAVEFORMS
ENABLE AND DISABLE TIMES
Notes:
1. C
L
includes probe and jig capacitance.
2. Waveform 1 is for an output with internal conditions such that the output is LOW except when disabled by the output control.
Waveform 2 is for an output with internal conditions such that the output is HIGH except when disabled by the output control.
3. All input pulses are supplied by generators having the following characteristics: PRR<10MHz, Z
O
= 50Ω, t
r
≤
2.5ns, t
f
≤
2.5ns.
4. The outputs are measured one at a time with one transition per measurement.
5. t
PLZ
and t
PHZ
are the same as t
dis
.
6. t
PZL
and t
PZH
are the same as t
en
.
7. t
PLH
and t
PHL
are the same as t
pd
.
Pericom Semiconductor Corporation
2380 Bering Drive San Jose, CA 95131 1-800-435-2336 Fax (408) 435-1100 http://www.pericom.com
3
PS8370
12/18/98
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