Please use this data sheet in conjunction with the technical information:
CX02048 Product Bulletin:
CX02048 Application Note:
BCC Package Application Note:
Bare Die Application Note:
02048-PBD-001-B
Note 0019 Rev 01
AN0004 Rev 01
Note 0024 Rev 02
Information provided in this Data Sheet is PRELIMINARY and is subject to change without notice.
Mindspeed Technologies™, Inc, Proprietary and Confidential
02048-DSH-001-B
March 2003
CX02048
Low Power 3.3 Volt Limiting Amplifier for Data Rates to 3.3 Gbps
T
ABLE OF
C
ONTENTS
Features ...........................................................................................................................................................3
Table 1 Ordering Information ............................................................................................................................3
Top Level Diagram ...........................................................................................................................................3
Table 5 DC Characteristics ...............................................................................................................................6
Table 6 AC Characteristics ...............................................................................................................................7
DC Offset Compensation ..................................................................................................................................8
Signal Level Detector .......................................................................................................................................8
JAM Function ....................................................................................................................................................9
Applications Information ...................................................................................................................................10
Setting Signal Detect Level ..............................................................................................................................10
Typical Signal Detect Level ..............................................................................................................................11
Package Information .........................................................................................................................................12
Bare Die ............................................................................................................................................................13
Table 8 Pad Co-ordinates .................................................................................................................................13
Contact Information ...........................................................................................................................................15
Preliminary Information
02048-DSH-001-B
Information provided in this Data Sheet is PRELIMINARY and is subject to change without notice.
Mindspeed Technologies™, Proprietary and Confidential
Page 2 of 15
CX02048
Low Power 3.3 Volt Limiting Amplifier for Data Rates to 3.3 Gbps
F
EATURES
!
!
!
!
!
!
!
!
!
D
ESCRIPTION
The CX02048 is an integrated high-gain limiting amplifier
intended for high-speed fiber optics based
communications. Placed following the photodetector and
transimpedance amplifier, the limiting amplifier provides
the necessary gain to ensure full CML output swing even
at minimum input sensitivity.
Capable of operating over a very wide frequency range,
the CX02048 supports data rates up to 3.3 Gbps.
The CX02048 also includes a programmable signal level
detector, allowing the user to set the threshold at which
the status logic outputs are enabled.
Wide dynamic range with 5 mV input sensitivity at
3.3 Gbps
Programmable input signal level detect
Fully differential
CML data outputs with default <80 ps rise and fall
time
Temperature range 0 to +85°C
Operates with +3.3 V supply
Supply current typically 26 mA
Programmable output amplitude (default 400 mVpp
differential)
On-chip DC offset cancellation circuit; no external
capacitors needed
Preliminary Information
T
ABLE
1
Part Number
CX02048DIEWP
CX02048WAFER
CX02048B16
CX02048B16TR
M02048-EVM
O
RDERING
I
NFORMATION
Pin Package
Waffle Packed Die
Expanded whole wafer on a Grip ring
BCC++16
BCC++16 Tape and Reel
Evaluation board
A
PPLICATIONS
!
!
!
3.3 Gbps SDH/SONET with FEC
2.5 Gbps STM-16/OC-48 SDH/SONET
2.12 Gbps Fibre Channel
Please see application note CX02048-Note 0019.
C
ONNECTIONS
Fig. 1
BCC++16 Package
JAM
ST
ST
T
OP
L
EVEL
D
IAGRAM
Fig. 2
VCCA
AMP
SET
V
D
CC
Top View
R
SSI
1
16
15
14
13
I REF
50
50
Amplitude
Control
Limiting
Amplifier
CML
Buffer
100
100
AMPSET
DOUT
DOUT
V D
CC
2
12
V
A
CC
4mm
D IN
D IN
3
(GND)
DOUT
D OUT
CMOS
Buffer
11
D IN
D IN
N/C
4
10
JAM
ST
5
6
7
8
9
Level
Detector
RSSI
Threshold
Setting
Circuit
VSET
Comparator
ST
Biasing
I REF
V
SET
4mm
VCCA
02048-DSH-001-B
Information provided in this Data Sheet is PRELIMINARY and is subject to change without notice.
Mindspeed Technologies™, Proprietary and Confidential
N/C
Page 3 of 15
CX02048
Low Power 3.3 Volt Limiting Amplifier for Data Rates to 3.3 Gbps
T
ABLE
2
Die Pads
23
1
2
3
4
5
6
7
8
9
10
11
-
-
12
13
14
15
16
17
18
19
20
21
22
-
BCC++16
1
2
-
-
3
4
-
5
6
-
7
-
8
9
10
11
-
-
12
13
-
14
15
16
-
Center
Name
R
SSI
AMP
SET
GNDD
GNDD
D
OUT
D
OUT
GNDD
V
CC
D
V
CC
A
GNDA
V
SET
GNDA
NC
NC
D
IN
D
IN
GNDA
GNDA
V
CC
A
I
REF
GNDA
JAM
ST
ST
GNDA
GND
Function
Receiver signal strength indication. Connect to ground with a 4.7 nF capacitor
(referenced to V
CC
)
Enables setting of output voltage swing from 400 mV pp differential to 800 mV pp
differential using an external 1% resistor (R
AMPSET
to ground)
Digital ground
Digital ground
Inverting differential data output
Non-inverting differential data output
Digital ground
Digital positive supply
Analog positive supply
Analog ground
Signal detect threshold setting input. User programmed with 1% resistor (R
SET
) to V
CC
Analog ground
Not connected
Not connected
Non-inverting data input
Inverting data input
Analog ground
Analog ground
Analog positive supply
This pin generates an on-chip reference current, and must be connected via an external
1% resistor (R
REF
) to ground
Analog ground
When HIGH data outputs D
OUT
and D
OUT
are disabled (D
OUT
being held LOW and D
OUT
being held HIGH)
Logical inverse of ST pin. May be connected to JAM pin to enable automatic jam
function on output. This is an open drain output with an internal 100K
Ω
pull-up
Input signal level status. This output is low when the input signal is below the set
threshold. This is an open drain output with an internal 100K
Ω
pull-up
Analog ground
Ground. Connect via die-plate
P
IN
D
ESCRIPTIONS
Preliminary Information
02048-DSH-001-B
Information provided in this Data Sheet is PRELIMINARY and is subject to change without notice.
Mindspeed Technologies™, Proprietary and Confidential
Page 4 of 15
CX02048
Low Power 3.3 Volt Limiting Amplifier for Data Rates to 3.3 Gbps
T
ABLE
3
Parameter
Power supply voltage (V
CC
-GND)
Operating ambient temperature
Storage temperature
A
BSOLUTE
M
AXIMUM
R
ATINGS
Preliminary Information
Rating
-0.5 to +6V
0 to +85
-65 to +150
Units
V
°C
°C
These are the absolute maximum ratings at or beyond which the IC can be expected to fail or be damaged. Reliable
operation at these extremes for any length of time is not implied.
Note: The die-plate must be adequately grounded to ensure correct thermal and electrical performance, and it is
recommended that vias are inserted through to a lower ground plane.
T
ABLE
4
Parameter
Power supply (V
CC
-GND)
Junction temperature
Operating ambient
R
ECOMMENDED
O
PERATING
C
ONDITIONS
Rating
3.3 ± 10%
0 to +110
0 to +85
Units
V
°C
°C
02048-DSH-001-B
Information provided in this Data Sheet is PRELIMINARY and is subject to change without notice.
Mindspeed Technologies™, Proprietary and Confidential
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