P4SMA6.8A thru P4SMA550CA
Surface Mount Transient
Voltage Suppressors
PRODUCT SUMMARY
Peak Pulse Power 400W
Breakdown voltage 6.8 to 550V
FEATURES
Plastic package has Underwriters Laboratory Flammability
Classification 94V-0
Optimized for LAN protection applications
Ideal for ESD protection of data lines in accordance with
IEC 1000-4-2 (IEC801-2)
Ideal for EFT protection of data lines in accordance with
IEC1000-4-4 (IEC801-4)
Low profile package with built-in strain relief for surface
mounted applications
Glass passivated junction
Low incremental surge resistance, excellent clamping capability
400W peak pulse power capability with a 10/1000us wave-
form, repetition rate (duty cycle): 0.01% (300W above 91V)
Very Fast response time
o
High temperature soldering guaranteed: 250 C/10 seconds
at terminals
MECHANICAL DATA
Case: JEDEC DO-214AC molded plastic over passivated chip
Terminals: Solder plated, solderable per MIL-STD-750,
Method 2026
Polarity: For uni-directional types the band denotes the cathode,
which is positive with respect to the anode under normal TVS
operation
Mounting Position: Any
Weight: 0.002oz., 0.064g
Devices for Bidirectional Applications
For bi-directional devices, use suffix CA (e.g. P4SMA10CA).
Electrical characteristics apply in both directions.
Pb-free; RoHS-compliant
08/23/2007 Rev.1.00
www.SiliconStandard.com
1
P4SMA6.8A thru P4SMA550CA
MAXIMUM RATINGS AND CHARACTERISTICS
(T
A
=25 C unless otherwise noted)
Parameter
Peak pulse power dissipation with a 10/1000
u
s waveform
(1)(2)
(Fig. 1)
Peak pulse current with a 10/1000
u
s waveform
(1)
(Fig. 3)
Power dissipation on infinite heatsink, T
A
=50
o
C
Peak forward surge current, 8.3ms single half sine-wave
uni-directional only
(2)
Thermal resistance junction to ambient air
(3)
Thermal resistance junction to leads
Operating junction and storage temperature range
Symbol
P
PPM
I
PPM
P
M(AV)
I
FSM
R
θ
JA
R
θ
JL
T
J
, T
STG
Value
400
See Next Table
1.0
40
120
30
-55 to +150
o
o
Unit
W
A
W
A
C/W
C/W
o
o
C
Notes:
1. Non-repetitive current pulse, per Fig. 3 and derated above T
A
=25
o
C per Fig. 2. Rating is 300W above 91V.
2. Mounted on 0.2 x 0.2” (5.0 x 5.0mm) copper pads to each terminal
3. Mounted on minimum recommended pad layout
08/23/2007 Rev.1.00
www.SiliconStandard.com
2
P4SMA6.8A thru P4SMA550CA
ELECTRICAL CHARACTERISTICS
Ratings at 25 C ambient temperature unless otherwise specified.
V
F
=3.5V at I
F
=25A (uni-directional only)
Maximum
reverse
leakage
at V
WM
I
D(3)
(uA)
1000
500
200
50
10
5.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
o
Device marking
co d e
Device type
P4SMA6.8A
P4SMA7.5A
P4SMA8.2A
P4SMA9.1A
P4SMA10A
P4SMA11A
P4SMA12A
P4SMA13A
P4SMA15A
P4SMA16A
P4SMA18A
P4SMA20A
P4SMA22A
P4SMA24A
P4SMA27A
P4SMA30A
P4SMA33A
P4SMA36A
P4SMA39A
P4SMA43A
P4SMA47A
P4SMA51A
P4SMA56A
P4SMA62A
P4SMA68A
P4SMA75A
P4SMA82A
P4SMA91A
P4SMA100A
P4SMA110A
P4SMA120A
P4SMA130A
P4SMA150A
P4SMA160A
P4SMA170A
P4SMA180A
P4SMA200A
P4SMA220A
P4SMA250A
P4SMA300A
P4SMA350A
P4SMA400A
P4SMA440A
P4SMA480A
P4SMA510A
P4SMA530A
P4SMA540A
P4SMA550A
UNI
6V 8A
7V 5A
8V 2A
9V 1A
10A
11A
12A
13A
15A
16A
18A
20A
22A
24A
27A
30A
33A
36A
39A
43A
47A
51A
56A
62A
68A
75A
82A
91A
100A
110A
120A
130A
150A
160A
170A
180A
200A
220A
250A
300A
350A
400A
440A
480A
510A
530A
540A
550A
BI
6V 8C
7V 5C
8V 2C
9V 1C
10C
11C
12C
13C
15C
16C
18C
20C
22C
24C
27C
30C
33C
36C
39C
43C
47C
51C
56C
62C
68C
75C
82C
91C
100C
110C
120C
130C
150C
160C
170C
180C
200C
220C
250C
300C
350C
400C
440C
480C
510C
530C
540C
550C
Breakdow n voltage
V
(BR)
(Volts)
(1)
Min.
6.45
7.13
7.79
8.65
9.50
10.5
11.4
12.4
14.3
15.2
17.1
19.0
20.9
22.8
25.7
28.5
31.4
34.2
37.1
40.9
44.7
48.5
53.2
58.9
64.6
71.3
77.9
86.5
95.0
105
114
124
143
152
162
171
190
209
237
285
332
380
418
456
485
503.5
513
522.5
Max.
7.14
7.88
8.61
9.55
10.5
11.6
12.6
13.7
15.8
16.8
18.9
21.0
23.1
25.2
28.4
31.5
34.7
37.8
41.0
45.2
49.4
53.6
58.8
65.1
71.4
78.8
86.1
95.5
105
116
126
137
158
168
179
189
210
231
263
315
368
420
462
504
535
556.5
567
577.5
Test
current
at I
T
(mA)
10
10
10
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
1.0
Stand-off
voltage
V
WM
(Volts)
5.80
6.40
7.02
7.78
8.55
9.40
10.2
11.1
12.8
13.6
15.3
17.1
18.8
20.5
23.1
25.6
28.2
30.8
33.3
36.8
40.2
43.6
47.8
53.0
58.1
64.1
70.1
77.8
85.5
94.0
102
111
128
136
145
154
171
185
214
256
300
342
376
408
434
477
459
495
Maximum
peak pulse
current
I
PPM(2)
(A)
38.1
35.4
33.1
29.9
27.6
25.6
24.0
22.0
18.9
17.8
15.9
14.4
13.1
12.0
10.7
9.7
8.8
8.0
7.4
6.7
6.2
5.7
5.2
4.7
4.3
3.9
3.5
3.2
2.2
2.0
1.8
1.7
1.4
1.4
1.3
1.2
1.1
0.9
1.2
1.0
0.9
0.8
0.7
0.6
0.6
0.6
0.5
0.5
Maximum
clamping
voltage at
I
PPM
V
C
(Volts)
10.5
11.3
12.1
13.4
14.5
15.6
16.7
18.2
21.2
22.5
25.2
27.7
30.6
33.2
37.5
41.4
45.7
49.9
53.9
59.3
64.8
70.1
77.0
85.0
92.0
104
113
125
137
152
165
179
207
219
234
246
274
328
344
414
482
548
602
658
698
725
740
760
Maximum
temperature
coefficient
of V
(BR)
(% /
o
C)
0.057
0.061
0.065
0.068
0.073
0.075
0.078
0.081
0.084
0.086
0.088
0.090
0.092
0.094
0.096
0.097
0.098
0.099
0.100
0.101
0.101
0.102
0.103
0.104
0.104
0.105
0.105
0.106
0.106
0.107
0.107
0.107
0.106
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
0.108
Notes:
1. V
(BR)
measured after I
T
applied for 300us, I
T
=square wave pulse or equivalent
2. Surge current waveform per Fig. 3 and derate per Fig. 2
3. All terms and symbols are consistent with ANSI/IEEE CA62.35
4. For bidirectional types with V
R
10 Volts and less, the I
D
limit is doubled
08/23/2007 Rev.1.00
www.SiliconStandard.com
3
P4SMA6.8A thru P4SMA550CA
RATINGS AND CHARACTERISTIC CURVES
(T
A
=25 C unless otherwise noted)
o
Information furnished by Silicon Standard Corporation is believed to be accurate and reliable. However, Silicon Standard Corporation makes no
guarantee or warranty, expressed or implied, as to the reliability, accuracy, timeliness or completeness of such information and assumes no
responsibility for its use, or for infringement of any patent or other intellectual property rights of third parties that may result from its
use. Silicon Standard reserves the right to make changes as it deems necessary to any products described herein for any reason, including
without limitation enhancement in reliability, functionality or design. No license is granted, whether expressly or by implication, in relation to
the use of any products described herein or to the use of any information provided herein, under any patent or other intellectual property rights of
Silicon Standard Corporation or any third parties.
08/23/2007 Rev.1.00
www.SiliconStandard.com
4
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