MOTOROLA
Freescale Semiconductor, Inc.
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM44256B/D
4MB R4000 Secondary Cache Fast
Static RAM Module Set
Four MCM44256B modules comprise a full 4 MB of secondary cache for the
R4000 processor. Each module contains nine MCM6729DWJ fast static RAMs
for a cache data size of 256K x 36. The tag portion, dependent on word line size,
contains either two MCM6729DWJ or one MCM6726DWJ fast static RAMs. All
input signals, except A0 and WE are buffered using 74FBT2827 drivers with se-
ries 25
Ω
resistors.
The MCM6729DWJ and MCM6726DWJ are fabricated using high–perfor-
mance silicon–gate BiCMOS technology. Static design eliminates the need for
internal clocks or timing strobes.
All 4MB R4000 supported secondary cache options are available.
Single 5 V
±
10% Power Supply
All Inputs and Outputs are TTL Compatible
Fast Module Access Time: 12/15/17 ns
Zero Wait–State Operation
Unified or Split Secondary Cache is Supported
Word Line Sizes of 4, 8, 16, and 32 are Available (See Ordering
Information for Details)
•
Decoupling Capacitors are Used for Each Fast Static RAM and Buffer,
Along with Bulk Capacitance for Maximum Noise Immunity
•
High Quality Multi–Layer FR4 PWB with Separate Power and Ground
Planes
•
•
•
•
•
•
MCM44256B
Series
PIN ASSIGNMENT
80 LEAD SIMM — TOP VIEW
VCC
DQ1
DQ3
DQ5
VSS
DQ8
DQ10
DQ12
DQ14
DQ15
DQ17
DQ19
DQ21
VSS
DQ23
DQ25
DQ27
DQ29
DQ30
2
4
6
8
10
12
14
16
18
20
22
24
26
28
30
32
34
36
38
40
42
44
46
48
50
52
54
56
58
60
62
64
66
68
70
72
74
76
78
80
1
3
5
7
9
11
13
15
17
19
21
23
25
27
29
31
33
35
37
39
41
43
45
47
49
51
53
55
57
59
61
63
65
67
69
71
73
75
77
79
VSS
DQ0
DQ2
DQ4
DQ6
DQ7
DQ9
DQ11
DQ13
VSS
DQ16
DQ18
DQ20
DQ22
VCC
DQ24
DQ26
DQ28
VSS
DQ31
DQ33
DQ35
WE
A1
A3
A5
VSS
DCS
A7
A9
A11
A12
A14
A16
TCS
VSS
TDQ2
TDQ4
TDQ6
VCC
Freescale Semiconductor, Inc...
PIN NAMES
A0 – A17 . . . . . . . . . . . . . . . . Address Inputs
WE . . . . . . . . . . . . . . . . . . . . . . . Write Enable
DCS . . . . . . . . . . . . . . . . . . . . . . Data Enable
TCS . . . . . . . . . . . . . . . . . . . . . . . Tag Enable
OE . . . . . . . . . . . . . . . . . . . . . Output Enable
DQ0 – DQ35 . . . . . . . . . Data Input / Output
TDQ0 – TDQ7 . . . TAG Data Input / Output
VCC . . . . . . . . . . . . . . . . + 5 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . . Ground
For proper operation of the device, VSS must
be connected to ground.
DQ32
DQ34
VSS
A0
A2
A4
A6
VCC
OE
A8
A10
VSS
A13
A15
A17
TDQ0
TDQ1
TDQ3
TDQ5
TDQ7
VSS
11/19/97
©
Motorola, Inc. 1997
MOTOROLA FAST SRAM
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MCM44256B SERIES
1
Freescale Semiconductor, Inc.
BLOCK DIAGRAM
256K x 36 CACHE
TCS
DCS
OE
A1
A2
A3 – A17
A0
DQ0 – DQ35
WE
TDQ0 – TDQ7
256K x 4
74FBT2827
DRIVER
E
G
A1
A2
A3 – A17
A0
DQ0 – DQ3
W
8
TAG OPTIONS:
36
Freescale Semiconductor, Inc...
256K x 4
A0
A1
A2
A3 – A17
E
W
G
DQ0 – DQ3
4 WORD
LINE SIZE
256K x 8
TAG
128K x 8
A0
A1
A2 – A16
E
W
G
DQ0 – DQ7
8 WORD
LINE SIZE
128K x 8
TAG
(A0 NOT USED)
128K x 8
A0
A1
A2 – A16
E
W
G
DQ0 – DQ7
16 WORD
LINE SIZE
64K x 8
TAG
(A0, A1 NOT USED)
128K x 8
A0
A1
A2 – A16
E
W
G
DQ0 – DQ7
32 WORD
LINE SIZE
32K x 8
TAG
(A0, A1, A2 NOT USED)
MCM44256B SERIES
2
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MOTOROLA FAST SRAM
Freescale Semiconductor, Inc.
ABSOLUTE MAXIMUM RATINGS
(Voltages Referenced to VSS = 0 V)
Rating
Power Supply Voltage
Voltage Relative to VSS
Output Current (per I/O)
Power Dissipation
Temperature Under Bias
Storage Temperature
Symbol
VCC
Vin, Vout
Iout
PD
Tbias
Tstg
Value
– 0.5 to 7.0
– 0.5 to VCC + 0.5
±
30
10
– 10 to + 85
– 25 to +125
Unit
V
V
mA
W
°C
°C
This devices on this module contain circuitry
to protect the inputs against damage due to
high static voltages or electric fields; however,
it is advised that normal precautions be taken
to avoid application of any voltage higher than
maximum rated voltages to these high–imped-
ance circuits.
These BiCMOS memory circuits have been
designed to meet the dc and ac specifications
shown in the tables, after thermal equilibrium
has been established. The module is in a test
socket or mounted on a printed circuit board
and transverse air flow of at least 500 linear feet
per minute is maintained.
NOTE: Permanent device damage may occur if ABSOLUTE MAXIMUM RATINGS are
exceeded. Functional operation should be restricted to RECOMMENDED OPER-
ATING CONDITIONS. Exposure to higher than recommended voltages for
extended periods of time could affect device reliability.
DC OPERATING CONDITIONS AND CHARACTERISTICS
Freescale Semiconductor, Inc...
(VCC = 5.0 V
±
10%, TA = 0 to + 70°C, Unless Otherwise Noted)
RECOMMENDED OPERATING CONDITIONS
(Voltages Referenced to VSS = 0 V)
Parameter
Supply Voltage (Operating Voltage Range)
Input High Voltage
(DQ0 – 35, TDQ0 – 7, WE, A0)
(A1 – A17, OE, DCS, TCS)
Input Low Voltage
VIL
Symbol
VCC
VIH
2.2
2.0
– 0.5
**
—
—
—
VCC + 0.3 V*
VCC + 0.3 V*
0.8
V
Min
4.5
Typ
5.0
Max
5.5
Unit
V
V
* VIH (max) = VCC + 0.3 V dc; VIH (max) = VCC + 2 V ac (pulse width
≤
20 ns).
** VIL (min) = – 3.0 V ac (pulse width
≤
20 ns).
DC CHARACTERISTICS
Parameter
Input Leakage Current (All Inputs, Vin = 0 to VCC)
Output Leakage Current (G, xCS = VIH, Vout = 0 to VCC)
AC Supply Current (G, xCS = VIL, Iout = 0 mA)
Output Low Voltage (IOL = + 8 mA)
OUtput High Voltage (IOH = – 4.0 mA)
Symbol
Ilkg(I)
Ilkg(O)
ICCA
VOL
VOH
Min
2.4
Typ
Max
±
10
±
10
1750
0.4
Unit
µA
µA
mA
V
V
NOTE: Good decoupling of the local power supply should always be used.
CAPACITANCE
(f = 1.0 MHz, dV = 3.0 V, TA = 25°C, Periodically Sampled Rather Than 100% Tested)
Parameter
Input Capacitance
Input/Output Capacitance
(A0, WE)
(A1 – A17, OE, DCS, TCS)
Symbol
Cin
Cin
Cout
Typ
Max
110
10
10
Unit
pF
pF
pF
MOTOROLA FAST SRAM
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MCM44256B SERIES
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Freescale Semiconductor, Inc.
AC OPERATING CONDITIONS AND CHARACTERISTICS
(VCC = 5.0 V
±
10%, TA = 0 to + 70°C, Unless Otherwise Noted)
Input Timing Measurement Reference Level . . . . . . . . . . . . . . . 1.5 V
Input Pulse Levels . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0 to 3.0 V
Input Rise/Fall Time . . . . . . . . . . . . . . . . . . . . . . 1 V/ns (20% to 80%)
Output Timing Measurement Reference Level . . . . . . . . . . . . . 1.5 V
Output Load . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . See Figure 1
READ CYCLE
(See Notes 1 and 2)
–12
Parameter
P
Address Access Time
A0 Access Time
Data/Tag Enable Access Time
Output Enable Access Time
Output Hold from Address Change
Symbol
S b l
tAVQV
tA0AQV
tELQV
tGLQV
tAXQX
tA0XQX
tELQX
tEHQZ
tGLQX
tGHQZ
Min
—
—
—
—
4
4
2
1
1
1
Max
12
10
12
9
—
—
—
9
—
9
Min
—
—
—
—
4
4
2
1
1
1
–15
Max
15
12
15
10
—
—
—
10
—
10
Min
—
—
—
—
4
4
2
1
1
1
–17
Max
17
14
17
11
—
—
—
11
—
11
Unit
U i
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
3, 4
3, 4
3, 4
3, 4
Notes
N
Freescale Semiconductor, Inc...
Output Hold from A0 Change
Data/Tag Enable Low to Output Active
Data/Tag Enable High to Output High–Z
Output Enable Low to Output Active
Output Enable High to Output High–Z
NOTES:
1. WE is high for read cycle.
2. Enable timings are the same for both DCS and TCS.
3. Transition is measured 200 mV from steady–state voltage.
4. This parameter is sampled and not 100% tested.
TIMING LIMITS
The table of timing values shows either a minimum
or a maximum limit for each parameter. Input require-
ments are specified from the external system point of
view. Thus, address setup time is shown as a mini-
mum since the system must supply at least that much
time. On the other hand, responses from the memory
are specified from the device point of view. Thus, the
access time is shown as a maximum since the device
never provides data later than that time.
OUTPUT
Z0 = 50
Ω
RL = 50
Ω
VL = 1.5 V
Figure 1. AC Test Load
MCM44256B SERIES
4
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MOTOROLA FAST SRAM
Freescale Semiconductor, Inc.
READ CYCLE 1
(See Note)
A1 – A17
tAVQV
A0
tA0VQV
tA0XQX
tAXQX
Q (DATA OUT)
PREVIOUS DATA VALID
DATA VALID
NOTE: Module is continuously selected (DCS or TCS = VIL, OE = VIL).
Freescale Semiconductor, Inc...
READ CYCLE 2
(See Note)
A1 – A17
tAVQV
A0
tA0VQV
tELQV
tEHQZ
DCS/TCS
(DATA/TAG ENABLE)
tELQX
OE (OUTPUT ENABLE)
tGLQV
tGLQX
Q (DATA OUT)
NOTE: Address valid prior to or coincident with DCS or TCS going low.
DATA VALID
tGHQZ
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MCM44256B SERIES
5