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7024S20JI8

Description
Dual-Port SRAM, 4KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84
Categorystorage    storage   
File Size189KB,22 Pages
ManufacturerIDT (Integrated Device Technology)
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7024S20JI8 Overview

Dual-Port SRAM, 4KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84

7024S20JI8 Parametric

Parameter NameAttribute value
Is it lead-free?Contains lead
Is it Rohs certified?incompatible
MakerIDT (Integrated Device Technology)
package instruction1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84
Reach Compliance Codenot_compliant
ECCN codeEAR99
Maximum access time20 ns
I/O typeCOMMON
JESD-30 codeS-PQCC-J84
JESD-609 codee0
memory density65536 bit
Memory IC TypeDUAL-PORT SRAM
memory width16
Humidity sensitivity level1
Number of functions1
Number of ports2
Number of terminals84
word count4096 words
character code4000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize4KX16
Output characteristics3-STATE
Package body materialPLASTIC/EPOXY
encapsulated codeQCCJ
Encapsulate equivalent codeLDCC84,1.2SQ
Package shapeSQUARE
Package formCHIP CARRIER
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)225
power supply5 V
Certification statusNot Qualified
Maximum standby current0.000015 A
Minimum standby current4.5 V
Maximum slew rate0.29 mA
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)4.5 V
Nominal supply voltage (Vsup)5 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceTin/Lead (Sn85Pb15)
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationQUAD
Maximum time at peak reflow temperature30
HIGH-SPEED
4K x 16 DUAL-PORT
STATIC RAM
IDT7024S/L
Features
True Dual-Ported memory cells which allow simultaneous
reads of the same memory location
High-speed access
– Military: 20/25/35/55/70ns (max.)
– Industrial: 55ns (max.)
– Commercial: 15/17/20/25/35/55ns (max.)
Low-power operation
– IDT7024S
Active: 750mW (typ.)
Standby: 5mW (typ.)
– IDT7024L
Active: 750mW (typ.)
Standby: 1mW (typ.)
Separate upper-byte and lower-byte control for multiplexed
bus compatibility
IDT7024 easily expands data bus width to 32 bits or more
using the Master/Slave select when cascading more than
one device
M/S = H for
BUSY
output flag on Master
M/S = L for
BUSY
input on Slave
Interrupt Flag
On-chip port arbitration logic
Full on-chip hardware support of semaphore signaling
between ports
Fully asynchronous operation from either port
Battery backup operation—2V data retention
TTL-compatible, single 5V (±10%) power supply
Available in 84-pin PGA, Flatpack, PLCC, and 100-pin Thin
Quad Flatpack
Industrial temperature range (–40°C to +85°C) is available
for selected speeds
Green parts availble, see ordering information
Functional Block Diagram
R/W
L
UB
L
R/W
R
UB
R
LB
L
CE
L
OE
L
LB
R
CE
R
OE
R
I/O
8L
-I/O
15L
I/O
0L
-I/O
7L
BUSY
L
A
11L
A
0L
(1,2)
I/O
8R
-I/O
15R
I/O
Control
I/O
Control
I/O
0R
-I/O
7R
BUSY
R
Address
Decoder
12
(1,2)
MEMORY
ARRAY
12
Address
Decoder
A
11R
A
0R
CE
L
OE
L
R/W
L
SEM
L
(2)
INT
L
NOTES:
1. (MASTER):
BUSY
is output; (SLAVE):
BUSY
is input.
2.
BUSY
outputs and
INT
outputs are non-tri-stated push-pull.
ARBITRATION
INTERRUPT
SEMAPHORE
LOGIC
CE
R
OE
R
R/W
R
SEM
R
INT
R
(2)
2740 drw 01
M/S
JUNE 2013
1
©2013 Integrated Device Technology, Inc.
DSC 2740/14

7024S20JI8 Related Products

7024S20JI8 7024S55PFI 7024L55PFI 7024S20PFI8 7024S35JI8 7024S20JI 7024S25JI8
Description Dual-Port SRAM, 4KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 4KX16, 55ns, CMOS, PQFP100, TQFP-100 Multi-Port SRAM, 4KX16, 55ns, CMOS, PQFP100 Dual-Port SRAM, 4KX16, 20ns, CMOS, PQFP100, 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 Dual-Port SRAM, 4KX16, 35ns, CMOS, PQCC84, PLASTIC, LCC-84 Multi-Port SRAM, 4KX16, 20ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 Dual-Port SRAM, 4KX16, 25ns, CMOS, PQCC84, 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84
Reach Compliance Code not_compliant not_compliant not_compliant not_compliant compliant not_compliant compliant
ECCN code EAR99 EAR99 EAR99 EAR99 EAR99 EAR99 EAR99
Maximum access time 20 ns 55 ns 55 ns 20 ns 35 ns 20 ns 25 ns
JESD-30 code S-PQCC-J84 S-PQFP-G100 S-PQFP-G100 S-PQFP-G100 S-PQCC-J84 S-PQCC-J84 S-PQCC-J84
memory density 65536 bit 65536 bit 65536 bit 65536 bit 65536 bit 65536 bit 65536 bit
Memory IC Type DUAL-PORT SRAM DUAL-PORT SRAM MULTI-PORT SRAM DUAL-PORT SRAM DUAL-PORT SRAM MULTI-PORT SRAM DUAL-PORT SRAM
memory width 16 16 16 16 16 16 16
Number of terminals 84 100 100 100 84 84 84
word count 4096 words 4096 words 4096 words 4096 words 4096 words 4096 words 4096 words
character code 4000 4000 4000 4000 4000 4000 4000
Operating mode ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS ASYNCHRONOUS
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C 70 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C - -40 °C -40 °C
organize 4KX16 4KX16 4KX16 4KX16 4KX16 4KX16 4KX16
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCJ LFQFP QFP QFP QCCJ QCCJ QCCJ
Package shape SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER FLATPACK, LOW PROFILE, FINE PITCH FLATPACK FLATPACK CHIP CARRIER CHIP CARRIER CHIP CARRIER
Parallel/Serial PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL PARALLEL
Nominal supply voltage (Vsup) 5 V 5 V 5 V 5 V 5 V 5 V 5 V
surface mount YES YES YES YES YES YES YES
technology CMOS CMOS CMOS CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL COMMERCIAL INDUSTRIAL INDUSTRIAL
Terminal form J BEND GULL WING GULL WING GULL WING J BEND J BEND J BEND
Terminal location QUAD QUAD QUAD QUAD QUAD QUAD QUAD
Is it lead-free? Contains lead Contains lead Contains lead Contains lead Contains lead Contains lead -
Is it Rohs certified? incompatible incompatible incompatible incompatible incompatible incompatible -
Maker IDT (Integrated Device Technology) IDT (Integrated Device Technology) - IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology) IDT (Integrated Device Technology)
package instruction 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 TQFP-100 - 14 X 14 MM, 1.40 MM HEIGHT, TQFP-100 PLASTIC, LCC-84 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84 1.150 X 1.150 INCH, 0.170 INCH HEIGHT, PLASTIC, LCC-84
I/O type COMMON COMMON COMMON COMMON - COMMON -
JESD-609 code e0 e0 e0 e0 e0 e0 -
Humidity sensitivity level 1 3 3 3 - 1 -
Number of functions 1 1 - 1 1 1 1
Number of ports 2 2 2 2 - 2 -
Output characteristics 3-STATE 3-STATE 3-STATE 3-STATE - 3-STATE -
Encapsulate equivalent code LDCC84,1.2SQ QFP100,.63SQ,20 QFP100,.63SQ,20 QFP100,.63SQ,20 - LDCC84,1.2SQ -
Peak Reflow Temperature (Celsius) 225 240 240 240 225 225 -
power supply 5 V 5 V 5 V 5 V - 5 V -
Certification status Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified Not Qualified -
Maximum standby current 0.000015 A 0.015 A 0.004 A 0.000015 A - 0.000015 A -
Minimum standby current 4.5 V 4.5 V 2 V 4.5 V - 4.5 V -
Maximum slew rate 0.29 mA 0.3 mA 0.25 mA 0.29 mA - 0.37 mA -
Maximum supply voltage (Vsup) 5.5 V 5.5 V - 5.5 V 5.5 V 5.5 V 5.5 V
Minimum supply voltage (Vsup) 4.5 V 4.5 V - 4.5 V 4.5 V 4.5 V 4.5 V
Terminal surface Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) Tin/Lead (Sn85Pb15) TIN LEAD Tin/Lead (Sn85Pb15) -
Terminal pitch 1.27 mm 0.5 mm 0.5 mm 0.5 mm 1.27 mm 1.27 mm -
Maximum time at peak reflow temperature 30 20 20 20 30 30 -
Base Number Matches - 1 1 1 1 - -
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