SN74LS136N3 datasheet, PDF - EEWORLD Datasheet

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SN74LS136N3: DescriptionQuad 2-Input Exclusive-OR Gates with Open-Collector Outputs 14-PDIP 0 to 70; Categorylogic logic; File Size190KB，5 Pages; ManufacturerTexas Instruments; Websitehttp://www.ti.com.cn/

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SN74LS136N3 Overview

Quad 2-Input Exclusive-OR Gates with Open-Collector Outputs 14-PDIP 0 to 70

SN74LS136N3 Parametric

Parameter Name	Attribute value
Brand Name	Texas Instruments
Is it lead-free?	Contains lead
Is it Rohs certified?	incompatible
Maker	Texas Instruments
Parts packaging code	DIP
package instruction	DIP, DIP14,.3
Contacts	14
Reach Compliance Code	not_compliant
series	LS
JESD-30 code	R-PDIP-T14
length	19.305 mm
Load capacitance (CL)	15 pF
Logic integrated circuit type	XOR GATE
Number of functions	4
Number of entries	2
Number of terminals	14
Maximum operating temperature	70 °C
Minimum operating temperature
Output characteristics	OPEN-COLLECTOR
Package body material	PLASTIC/EPOXY
encapsulated code	DIP
Encapsulate equivalent code	DIP14,.3
Package shape	RECTANGULAR
Package form	IN-LINE
Peak Reflow Temperature (Celsius)	NOT SPECIFIED
power supply	5 V
Maximum supply current (ICC)	10 mA
propagation delay (tpd)	30 ns
Certification status	Not Qualified
Schmitt trigger	NO
Maximum seat height	5.08 mm
Maximum supply voltage (Vsup)	5.25 V
Minimum supply voltage (Vsup)	4.75 V
Nominal supply voltage (Vsup)	5 V
surface mount	NO
technology	TTL
Temperature level	COMMERCIAL
Terminal form	THROUGH-HOLE
Terminal pitch	2.54 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	NOT SPECIFIED
width	7.62 mm

SN74LS136N3 Related Products

	SN74LS136N3	SNJ54LS136FK
Description	Quad 2-Input Exclusive-OR Gates with Open-Collector Outputs 14-PDIP 0 to 70	Quad 2-Input Exclusive-OR Gates With Open-Collector Outputs 20-LCCC -55 to 125
Brand Name	Texas Instruments	Texas Instruments
Is it lead-free?	Contains lead	Contains lead
Is it Rohs certified?	incompatible	incompatible
Maker	Texas Instruments	Texas Instruments
Parts packaging code	DIP	QLCC
package instruction	DIP, DIP14,.3	QCCN, LCC20,.35SQ
Contacts	14	20
Reach Compliance Code	not_compliant	not_compliant
series	LS	LS
JESD-30 code	R-PDIP-T14	S-CQCC-N20
length	19.305 mm	8.89 mm
Load capacitance (CL)	15 pF	15 pF
Logic integrated circuit type	XOR GATE	XOR GATE
Number of functions	4	4
Number of entries	2	2
Number of terminals	14	20
Maximum operating temperature	70 °C	125 °C
Output characteristics	OPEN-COLLECTOR	OPEN-COLLECTOR
Package body material	PLASTIC/EPOXY	CERAMIC, METAL-SEALED COFIRED
encapsulated code	DIP	QCCN
Encapsulate equivalent code	DIP14,.3	LCC20,.35SQ
Package shape	RECTANGULAR	SQUARE
Package form	IN-LINE	CHIP CARRIER
Peak Reflow Temperature (Celsius)	NOT SPECIFIED	NOT SPECIFIED
power supply	5 V	5 V
Maximum supply current (ICC)	10 mA	10 mA
propagation delay (tpd)	30 ns	30 ns
Certification status	Not Qualified	Not Qualified
Schmitt trigger	NO	NO
Maximum seat height	5.08 mm	2.03 mm
Maximum supply voltage (Vsup)	5.25 V	5.5 V
Minimum supply voltage (Vsup)	4.75 V	4.5 V
Nominal supply voltage (Vsup)	5 V	5 V
surface mount	NO	YES
technology	TTL	TTL
Temperature level	COMMERCIAL	MILITARY
Terminal form	THROUGH-HOLE	NO LEAD
Terminal pitch	2.54 mm	1.27 mm
Terminal location	DUAL	QUAD
Maximum time at peak reflow temperature	NOT SPECIFIED	NOT SPECIFIED
width	7.62 mm	8.89 mm

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