INTEGRATED CIRCUITS
DATA SHEET
For a complete data sheet, please also download:
•
The IC04 LOCMOS HE4000B Logic
Family Specifications HEF, HEC
•
The IC04 LOCMOS HE4000B Logic
Package Outlines/Information HEF, HEC
HEF4514B
MSI
1-of-16 decoder/demultiplexer with
input latches
Product specification
File under Integrated Circuits, IC04
January 1995
Philips Semiconductors
Product specification
1-of-16 decoder/demultiplexer with input latches
DESCRIPTION
The HEF4514B is a 1-of-16 decoder/demultiplexer, having
four binary weighted address inputs (A
0
to A
3
), a latch
enable input (EL), and an active LOW enable input (E).
The 16 outputs (O
0
to O
15
) are mutually exclusive active
HIGH. When EL is HIGH, the selected output is
determined by the data on A
n
. When EL goes LOW, the
HEF4514B
MSI
last data present at A
n
are stored in the latches and the
outputs remain stable. When E is LOW, the selected
output, determined by the contents of the latch, is HIGH.
At E HIGH, all outputs are LOW. The enable input (E) does
not affect the state of the latch. When the HEF4514B is
used as a demultiplexer, E is the data input and A
0
to
A
3
are the address inputs.
Fig.1 Functional diagram.
HEF4514BP(N):
HEF4514BD(F):
HEF4514BT(D):
24-lead DIL; plastic
(SOT101-1)
24-lead DIL; ceramic (cerdip)
(SOT94)
24-lead SO; plastic
(SOT137-1)
( ): Package Designator North America
Fig.2 Pinning diagram.
APPLICATION INFORMATION
Some examples of applications for the HEF4514B are:
PINNING
A
0
to A
3
E
EL
O
0
to O
15
address inputs
enable input (active LOW)
latch enable input
outputs (active HIGH)
FAMILY DATA, I
DD
LIMITS category MSI
See Family Specifications
•
Digital multiplexing.
•
Address decoding.
•
Hexadecimal/BCD decoding.
January 1995
2
Philips Semiconductors
Product specification
1-of-16 decoder/demultiplexer with input latches
TRUTH TABLE
INPUTS
E
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Notes
1. EL = HIGH; H = HIGH state (the more positive voltage);
L = LOW state (the less positive voltage); X = state is immaterial
AC CHARACTERISTICS
V
SS
= 0 V; T
amb
= 25
°C;
C
L
= 50 pF; input transition times
≤
20 ns
V
DD
V
Propagation delays
A
n
, EL
→
O
n
HIGH to LOW
5
10
15
5
LOW to HIGH
E
→
O
n
HIGH to LOW
10
15
5
10
15
5
LOW to HIGH
10
15
t
PLH
t
PHL
t
PLH
t
PHL
260
95
65
270
95
65
175
65
45
200
70
50
520
190
130
550
190
130
350
130
90
400
140
100
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
233 ns
84 ns
57 ns
243 ns
84 ns
57 ns
148 ns
54 ns
37 ns
173 ns
59 ns
42 ns
+
+
+
+
+
+
+
+
+
+
+
+
SYMBOL
TYP.
MAX.
A
0
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
A
1
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
2
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
A
3
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
O
0
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
O
1
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
O
2
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
O
3
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
O
4
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
O
5
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
O
6
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
OUTPUTS
O
7
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
O
8
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
O
9
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
HEF4514B
MSI
O
10
O
11
O
12
O
13
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
L
O
14
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
L
O
15
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
H
TYPICAL EXTRAPOLATION
FORMULA
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
(0,55 ns/pF) C
L
(0,23 ns/pF) C
L
(0,16 ns/pF) C
L
January 1995
4
京公网安备 11010802033920号
EEWORLD
