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IDT71V256SA20YGI

Description
Cache SRAM, 32KX8, 20ns, CMOS, PDSO28, 0.300 INCH, SOJ-28
Categorystorage    storage   
File Size90KB,8 Pages
ManufacturerIDT (Integrated Device Technology)
Environmental Compliance  
Download Datasheet Parametric View All

IDT71V256SA20YGI Overview

Cache SRAM, 32KX8, 20ns, CMOS, PDSO28, 0.300 INCH, SOJ-28

IDT71V256SA20YGI Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerIDT (Integrated Device Technology)
Parts packaging codeSOJ
package instruction0.300 INCH, SOJ-28
Contacts28
Reach Compliance Codecompliant
ECCN codeEAR99
Maximum access time20 ns
JESD-30 codeR-PDSO-J28
JESD-609 codee3
length17.9324 mm
memory density262144 bit
Memory IC TypeCACHE SRAM
memory width8
Number of functions1
Number of terminals28
word count32768 words
character code32000
Operating modeASYNCHRONOUS
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
organize32KX8
Package body materialPLASTIC/EPOXY
encapsulated codeSOJ
Package shapeRECTANGULAR
Package formSMALL OUTLINE
Parallel/SerialPARALLEL
Peak Reflow Temperature (Celsius)260
Certification statusNot Qualified
Maximum seat height3.556 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)3 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMATTE TIN
Terminal formJ BEND
Terminal pitch1.27 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width7.5184 mm
Lower Power
3.3V CMOS Fast SRAM
256K (32K x 8-Bit)
Features
Description
IDT71V256SA
Ideal for high-performance processor secondary cache
Commercial (0°C to +70°C) and Industrial (–40°C to +85°C)
temperature range options
Fast access times:
– Commercial and Industrial: 10/12/15/20ns
Low standby current (maximum):
– 2mA full standby
Small packages for space-efficient layouts:
– 28-pin 300 mil SOJ
– 28-pin TSOP Type I
Produced with advanced high-performance CMOS
technology
Inputs and outputs are LVTTL-compatible
Single 3.3V(±0.3V) power supply
The IDT71V256SA is a 262,144-bit high-speed static RAM organized
as 32K x 8. It is fabricated using IDT’s high-performance, high-reliability
CMOS technology.
The IDT71V256SA has outstanding low power characteristics while
at the same time maintaining very high performance. Address access
times of as fast as 10ns are ideal for 3.3V secondary cache in 3.3V
desktop designs.
When power management logic puts the IDT71V256SA in standby
mode, its very low power characteristics contribute to extended battery life.
By taking
CS
HIGH, the SRAM will automatically go to a low power standby
mode and will remain in standby as long as
CS
remains HIGH. Further-
more, under full standby mode (CS at CMOS level, f=0), power consump-
tion is guaranteed to always be less than 6.6mW and typically will be much
smaller.
The IDT71V256SA is packaged in a 28-pin 300 mil SOJ and a 28-pin
300 mil TSOP Type I.
Functional Block Diagram
A
0
ADDRESS
DECODER
A
14
262,144 BIT
MEMORY ARRAY
V
CC
GND
I/O
0
INPUT
DATA
CIRCUIT
I/O
7
I/O CONTROL
CS
OE
WE
,
CONTROL
CIRCUIT
3101 drw 01
JUNE 2012
1
©2012 Integrated Device Technology, Inc.
DSC-3101/09
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