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74AUP1G3208GW

Description
Low-power 3-input OR-AND gate
Categorylogic    logic   
File Size70KB,16 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
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74AUP1G3208GW Overview

Low-power 3-input OR-AND gate

74AUP1G3208GW Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
Parts packaging codeSOT-363
package instructionTSSOP, TSSOP6,.08
Contacts6
Reach Compliance Codecompli
seriesAUP/ULP/V
JESD-30 codeR-PDSO-G6
JESD-609 codee3
length2 mm
Load capacitance (CL)30 pF
Logic integrated circuit typeOR-AND GATE
MaximumI(ol)0.0017 A
Humidity sensitivity level1
Number of functions1
Number of entries3
Number of terminals6
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeTSSOP
Encapsulate equivalent codeTSSOP6,.08
Package shapeRECTANGULAR
Package formSMALL OUTLINE, THIN PROFILE, SHRINK PITCH
method of packingTAPE AND REEL
Peak Reflow Temperature (Celsius)260
power supply1.2/3.3 V
Prop。Delay @ Nom-Su20.1 ns
propagation delay (tpd)20.1 ns
Certification statusNot Qualified
Schmitt triggerNO
Maximum seat height1.1 mm
Maximum supply voltage (Vsup)3.6 V
Minimum supply voltage (Vsup)0.8 V
Nominal supply voltage (Vsup)1.1 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceTin (Sn)
Terminal formGULL WING
Terminal pitch0.65 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width1.25 mm
Base Number Matches1
74AUP1G3208
Low-power 3-input OR-AND gate
Rev. 02 — 3 July 2009
Product data sheet
1. General description
The 74AUP1G3208 provides the Boolean function: Y = (A + B)
×
C. The user can choose
the logic functions OR, AND and OR-AND. All inputs can be connected to V
CC
or GND.
Schmitt trigger action at all inputs makes the circuit tolerant to slower input rise and fall
times across the entire V
CC
range from 0.8 V to 3.6 V.
This device ensures a very low static and dynamic power consumption across the entire
V
CC
range from 0.8 V to 3.6 V.
This device is fully specified for partial power-down applications using I
OFF
.
The I
OFF
circuitry disables the output, preventing the damaging backflow current through
the device when it is powered down.
2. Features
I
Wide supply voltage range from 0.8 V to 3.6 V
I
High noise immunity
I
Complies with JEDEC standards:
N
JESD8-12 (0.8 V to 1.3 V)
N
JESD8-11 (0.9 V to 1.65 V)
N
JESD8-7 (1.2 V to 1.95 V)
N
JESD8-5 (1.8 V to 2.7 V)
N
JESD8-B (2.7 V to 3.6 V)
I
ESD protection:
N
HBM JESD22-A114E Class 3A exceeds 5000 V
N
MM JESD22-A115-A exceeds 200 V
N
CDM JESD22-C101C exceeds 1000 V
I
Low static power consumption; I
CC
= 0.9
µA
(maximum)
I
Latch-up performance exceeds 100 mA per JESD 78 Class II
I
Inputs accept voltages up to 3.6 V
I
Low noise overshoot and undershoot < 10 % of V
CC
I
I
OFF
circuitry provides partial Power-down mode operation
I
Multiple package options
I
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C

74AUP1G3208GW Related Products

74AUP1G3208GW 74AUP1G3208GF 74AUP1G3208 74AUP1G3208GM
Description Low-power 3-input OR-AND gate Low-power 3-input OR-AND gate Low-power 3-input OR-AND gate Low-power 3-input OR-AND gate
Reach Compliance Code compli compli compli compli
Is it lead-free? Lead free Lead free - Lead free
Is it Rohs certified? conform to conform to - conform to
Parts packaging code SOT-363 SON - SON
package instruction TSSOP, TSSOP6,.08 1 X 1 MM, 0.50 MM HEIGHT, PLASTIC, SOT-891, SON-6 - 1 X 1.45 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT-886, SON-6
Contacts 6 6 - 6
series AUP/ULP/V AUP/ULP/V - AUP/ULP/V
JESD-30 code R-PDSO-G6 S-PDSO-N6 - R-PDSO-N6
JESD-609 code e3 e3 - e3
length 2 mm 1 mm - 1.45 mm
Load capacitance (CL) 30 pF 30 pF - 30 pF
Logic integrated circuit type OR-AND GATE OR-AND GATE - OR-AND GATE
MaximumI(ol) 0.0017 A 0.0017 A - 0.0017 A
Humidity sensitivity level 1 1 - 1
Number of functions 1 1 - 1
Number of entries 3 3 - 3
Number of terminals 6 6 - 6
Maximum operating temperature 125 °C 125 °C - 125 °C
Minimum operating temperature -40 °C -40 °C - -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY - PLASTIC/EPOXY
encapsulated code TSSOP VSON - VSON
Encapsulate equivalent code TSSOP6,.08 SOLCC6,.04,14 - SOLCC6,.04,20
Package shape RECTANGULAR SQUARE - RECTANGULAR
Package form SMALL OUTLINE, THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE - SMALL OUTLINE, VERY THIN PROFILE
method of packing TAPE AND REEL TAPE AND REEL - TAPE AND REEL
Peak Reflow Temperature (Celsius) 260 260 - 260
power supply 1.2/3.3 V 1.2/3.3 V - 1.2/3.3 V
Prop。Delay @ Nom-Su 20.1 ns 20.1 ns - 20.1 ns
propagation delay (tpd) 20.1 ns 20.1 ns - 20.1 ns
Certification status Not Qualified Not Qualified - Not Qualified
Schmitt trigger NO NO - NO
Maximum seat height 1.1 mm 0.5 mm - 0.5 mm
Maximum supply voltage (Vsup) 3.6 V 3.6 V - 3.6 V
Minimum supply voltage (Vsup) 0.8 V 0.8 V - 0.8 V
Nominal supply voltage (Vsup) 1.1 V 1.1 V - 1.1 V
surface mount YES YES - YES
technology CMOS CMOS - CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE - AUTOMOTIVE
Terminal surface Tin (Sn) Tin (Sn) - Tin (Sn)
Terminal form GULL WING NO LEAD - NO LEAD
Terminal pitch 0.65 mm 0.35 mm - 0.5 mm
Terminal location DUAL DUAL - DUAL
Maximum time at peak reflow temperature 30 30 - 30
width 1.25 mm 1 mm - 1 mm
Base Number Matches 1 1 1 -

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