19-2715; Rev 0; 1/03
16-Bit DACs with 16-Channel
Sample-and-Hold Outputs
General Description
The MAX5621/MAX5622/MAX5623 are 16-bit digital-to-
analog converters (DACs) with 16 sample-and-hold
(SHA) outputs for applications where a high number of
programmable voltages are required. These devices
include a clock oscillator and a sequencer that updates
the DAC with codes from an internal SRAM. No external
components are required to set offset and gain.
The MAX5621/MAX5622/MAX5623 feature a -4.5V to
+9.2V output voltage range. Other features include a
200µV/step resolution, with output linearity error, typi-
cally 0.005% of full-scale range (FSR). The 100kHz
refresh rate updates each SHA every 320µs, resulting
in negligible output droop. Remote ground sensing
allows the outputs to be referenced to the local ground
of a separate device.
These devices are controlled through a 20MHz
SPI™/QSPI™/MICROWIRE™-compatible 3-wire serial
interface. Immediate update mode allows any channel’s
output to be updated within 20µs. Burst mode allows
multiple values to be loaded into memory in a single,
high-speed data burst. All channels are updated within
330µs after data has been loaded.
Each device features an output clamp and output resis-
tors for filtering. The MAX5621 features a 50Ω output
impedance and is capable of driving up to 250pF of out-
put capacitance. The MAX5622 features a 500Ω output
impedance and is capable of driving up to 10nF of output
capacitance. The MAX5623 features a 1kΩ output imped-
ance and is capable of driving up to 10nF of output
capacitance.
The MAX5621/MAX5622/MAX5623 are available in 64-pin
TQFP (10mm x 10mm) and 68-pin thin QFN (10mm x
10mm) packages.
Features
o
Integrated 16-Bit DAC and 16-Channel SHA with
SRAM and Sequencer
o
16 Voltage Outputs
o
0.005% Output Linearity
o
200µV Output Resolution
o
Flexible Output Voltage Range
o
Remote Ground Sensing
o
Fast Sequential Loading: 1.3µs per Register
o
Burst and Immediate Mode Addressing
o
No External Components Required for Setting
Gain and Offset
o
Integrated Output Clamp Diodes
o
Three Output Impedance Options
MAX5621 (50Ω), MAX5622 (500Ω), and
MAX5623 (1kΩ)
MAX5621/MAX5622/MAX5623
Ordering Information
PART
MAX5621AECB
MAX5621AETK
MAX5622AECB
MAX5622AETK
MAX5623AECB
MAX5623AETK
TEMP RANGE
-40 C to +85 C
-40 C to +85 C
-40 C to +85 C
-40 C to +85 C
-40
o
C to +85
o
C
-40
o
C to +85
o
C
o
o
o
o
o
o
o
o
PIN-PACKAGE
64 TQFP
68 Thin QFN-EP*
64 TQFP
68 Thin QFN-EP*
64 TQFP
68 Thin QFN-EP*
*EP
= Exposed pad.
Pin Configurations
63
OUT15
61
OUT14
59
OUT13
56
OUT12
68
N.C.
66
V
REF
64
N.C.
62
N.C.
60
N.C.
57
N.C.
55
N.C.
67
CH
53
N.C.
33
TOP VIEW
54
OUT11
65
AGND
58
AGND
N.C.
1
N.C.
2
GS
3
V
LDAC
4
RST
5
CS
6
DIN
7
SCLK
8
V
LOGIC
IMMED
ECLK
CLKSEL
9
10
11
12
52
CL
51
N.C.
50
V
DD
49
CH
48
V
SS
47
OUT10
46
N.C.
45
OUT9
44
N.C.
43
OUT8
42
AGND
41
V
DD
40
N.C.
39
OUT7
38
N.C.
37
OUT6
36
N.C.
35
CL
34
________________________Applications
MEMS Mirror Servo Control
Industrial Process Control
Automatic Test Equipment
Instrumentation
MAX5621
MAX5622
MAX5623
DGND
13
V
LSHA
14
AGND
15
V
SS
16
N.C.
17
CL
19
OUT0
20
N.C.
21
OUT1
22
N.C.
23
OUT2
24
N.C.
25
AGND
26
OUT3
27
N.C.
28
OUT4
29
N.C.
30
31
V
DD
18
THIN QFN
SPI and QSPI are trademarks of Motorola, Inc.
MICROWIRE is a trademark of National Semiconductor, Corp.
Pin Configurations continued at end of data sheet.
1
________________________________________________________________
Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.
OUT5
CH
V
SS
N.C.
32
16-Bit DACs with 16-Channel
Sample-and-Hold Outputs
MAX5621/MAX5622/MAX5623
ABSOLUTE MAXIMUM RATINGS
V
DD
to AGND.......................................................-0.3V to +12.2V
V
SS
to AGND .........................................................-6.0V to +0.3V
V
DD
to V
SS
...........................................................................+15V
V
LDAC
, V
LOGIC
, V
LSHA
to AGND or DGND ..............-0.3V to +6V
REF to AGND............................................................-0.3V to +6V
GS to AGND................................................................V
SS
to V
DD
CL and CH to AGND...................................................V
SS
to V
DD
Logic Inputs to DGND ..............................................-0.3V to +6V
DGND to AGND........................................................-0.3V to +2V
Maximum Current into OUT_ ............................................±10mA
Maximum Current into Logic Inputs .................................±20mA
Continuous Power Dissipation (T
A
= +70°C)
64-Pin TQFP (derate 13.3mW/°C above +70°C) ............1066mW
68-Pin Thin QFN (derate 28.6mW/°C above +70°C) ......2285mW
Operating Temperature Range ...........................-40°C to +85°C
Maximum Junction Temperature .....................................+150°C
Storage Temperature Range .............................-65°C to +150°C
Lead Temperature (soldering, 10s) .................................+300°C
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0V, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DC CHARACTERISTICS
Resolution
Output Range
Offset Voltage
Offset Voltage Tempco
Gain Error
Gain Tempco
Integral Linearity Error
Differential Linearity Error
Maximum Output Drive Current
DC Output Impedance
INL
DNL
I
OUT
R
OUT
V
OUT_
= -3.25V to +7.6V
V
OUT_
= -3.25V to +7.6V; monotonicity
guaranteed to 14 bits
Sinking and sourcing
MAX5621
MAX5622
MAX5623
MAX5621
Maximum Capacitive Load
DC Crosstalk
Power-Supply Rejection Ratio
PSRR
MAX5622
MAX5623
Internal oscillator enabled (Note 3)
Internal oscillator enabled
±2
35
350
700
50
500
1000
250
10
10
-90
-80
65
650
1300
pF
nF
dB
dB
Ω
(Note 2)
±5
0.005
±1
0.015
±4
N
V
OUT_
(Note 1)
Code = 4F2C hex
16
V
SS
+
0.75
±15
±50
±1
V
DD
-
2.4
±200
Bits
V
mV
µV/°C
%
ppm/°C
%FSR
LSB
mA
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
2
_______________________________________________________________________________________
16-Bit DACs with 16-Channel
Sample-and-Hold Outputs
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0V, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
DYNAMIC CHARACTERISTICS
Sample-and-Hold Settling
SCLK Feedthrough
f
SEQ
Feedthrough
Hold-Step
Droop Rate
Output Noise
REFERENCE INPUT
Input Resistance
Reference Input Voltage
GROUND-SENSE INPUT
Input Voltage Range
Input Bias Current
GS Gain
Input High Voltage
Input Low Voltage
Input Current
TIMING CHARACTERISTICS
(Figure 2)
Sequencer Clock Frequency
External Clock Frequency
SCLK Frequency
SCLK Pulse Width High
SCLK Pulse Width Low
CS
Low to SCLK High Setup
Time
CS
High to SCLK High Setup
Time
SCLK High to
CS
Low Hold Time
f
SEQ
f
ECLK
f
SCLK
t
CH
t
CL
t
CSSO
t
CSS1
t
CSH0
15
15
15
15
10
Internal oscillator
(Note 7)
80
100
120
480
20
kHz
kHz
MHz
ns
ns
ns
ns
ns
V
IH
V
IL
V
GS
I
GS
-0.5V
≤
V
GS
≤
+0.5V
(Note 6)
-0.5
-60
0.998
2.0
0.8
±1
1
+0.5
0
1.002
V
µA
V/V
V
V
µA
V
REF
7
2.5
kΩ
V
V
OUT_
= 0V (Note 5), T
A
= +25°C
(Note 4)
0.5
0.5
0.25
1
250
1
40
0.08
%
nV-s
nV-s
mV
mV/s
µV
RMS
SYMBOL
CONDITIONS
MIN
TYP
MAX
UNITS
MAX5621/MAX5622/MAX5623
DIGITAL INTERFACE DC CHARACTERISTICS
_______________________________________________________________________________________
3
16-Bit DACs with 16-Channel
Sample-and-Hold Outputs
MAX5621/MAX5622/MAX5623
ELECTRICAL CHARACTERISTICS (continued)
(V
DD
= +10V, V
SS
= -4V, V
LOGIC
= V
LDAC
= V
LSHA
= +5V, V
REF
= +2.5V, AGND = DGND = V
GS
= 0V, R
L
≥
10MΩ, C
L
= 50pF,
CLKSEL = +5V, f
ECLK
= 400kHz, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are at T
A
= +25°C.)
PARAMETER
SCLK High to
CS
High Hold Time
DIN to SCLK High Setup Time
DIN to SCLK High Hold Time
RST
to
CS
Low
POWER SUPPLIES
Positive Supply Voltage
Negative Supply Voltage
Supply Difference
Logic Supply Voltage
Positive Supply Current
Negative Supply Current
Logic Supply Current
V
LOGIC
,
V
LDAC
,
V
LSHA
I
DD
I
SS
I
LOGIC
(Note 10)
f
SCLK
= 20MHz (Note 11)
V
DD
V
SS
(Note 9)
(Note 9)
V
DD
- V
SS
(Note 9)
4.75
5
32
32
1
2
8.55
-5.25
10
-4
11.60
-2.75
14.5
5.25
42
40
1.5
3
V
V
V
V
mA
mA
mA
SYMBOL
t
CSH1
t
DS
t
DH
(Note 8)
CONDITIONS
MIN
0
15
0
500
TYP
MAX
UNITS
ns
ns
ns
µs
Note 1:
The nominal zero-scale (code = 0) voltage is -4.0535V. The nominal full-scale (code = FFFF hex) voltage is +9.0535V. The
output voltage is limited by the Output Range specification, restricting the usable range of DAC codes. The nominal zero-
scale voltage can be achieved when V
SS
< -4.9V, and the nominal full-scale voltage can be achieved when V
DD
> +11.5V.
Note 2:
Gain is calculated from measurements:
for voltages V
DD
= 10V and V
SS
= -4V at codes C000 hex and 4F2C hex
for voltages V
DD
= 11.6V and V
SS
= -2.9V at codes FFFF hex and 252E hex
for voltages V
DD
= 9.25V and V
SS
= -5.25V at codes D4F6 hex and 0 hex
for voltages V
DD
= 8.55V and V
SS
= -2.75V at codes C74A hex and 281C hex
Note 3:
Steady-state change in any output with an 8V change in an adjacent output.
Note 4:
Settling during the first update for an 8V step. The output settles to within the linearity specification on subsequent updates.
Tested with an external sequencer clock frequency of 480kHz.
Note 5:
External clock mode with the external clock not toggling.
Note 6:
The output voltage is the sum of the DAC output and the voltage at GS. GS gain is measured at 4F2C hex.
Note 7:
The sequencer runs at f
SEQ
= f
ECLK
/4. Maximum speed is limited by settling of the DAC and SHAs. Minimum speed is
limited by acceptable droop and update time after a Burst Mode Update.
Note 8:
V
DD
rise to
CS
low = 500µs maximum.
Note 9:
Guaranteed by gain-error test.
Note 10:
The serial interface is inactive. V
IH
= V
LOGIC
, V
IL
= 0V.
Note 11:
The serial interface is active. V
IH
= V
LOGIC
, V
IL
= 0V.
4
_______________________________________________________________________________________
16-Bit DACs with 16-Channel
Sample-and-Hold Outputs
Typical Operating Characteristics
(V
DD
= +10V, V
SS
= -4V, V
REF
= +2.5V, V
GS
= 0V, T
A
= +25°C, unless otherwise noted.)
INTEGRAL NONLINEARITY
VS.
TEMPERATURE
MAX5621 toc02
MAX5621 toc03
MAX5621/MAX5622/MAX5623
INTEGRAL NONLINEARITY vs. CODE
MAX5621 toc01
DIFFERENTIAL NONLINEARITY vs. CODE
1.4
DIFFERENTIAL NONLINEARITY (LSB)
1.0
0.6
0.2
-0.2
-0.6
-1.0
-1.4
0.010
0.007
0.005
INTEGRAL NONLINEARITY (%)
0.003
0.001
-0.001
-0.003
-0.005
-0.007
4018 11769 19520 27271 35021 42723 58268
INPUT CODE
INTEGRAL NONLINEARITY (%)
0.008
0.006
0.004
0.002
4018 11769 19520 27271 35021 42723 58268
INPUT CODE
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
DIFFERENTIAL NONLINEARITY
VS.
TEMPERATURE
MAX5621 toc04
OFFSET VOLTAGE
VS.
TEMPERATURE
MAX5621 toc05
DROOP RATE vs. TEMPERATURE
CODE = 4F2C hex
EXTERNAL CLOCK MODE
NO CLOCK APPLIED
MAX5621 toc06
1.0
DIFFERENTIAL NONLINEARITY (LSB)
-10
V
DD
= +8.55V
V
SS
= -4V
CODE = 4F2C hex
100
10
DROOP RATE (mV/s)
1
0.100
0.010
0.001
0.0001
0.9
-12
OFFSET VOLTAGE (mV)
0.8
-14
0.7
-16
0.6
-18
0.5
-40
-15
10
35
60
85
TEMPERATURE (°C)
-20
-40
-15
10
35
60
85
TEMPERATURE (°C)
-40
-15
10
35
60
85
TEMPERATURE (°C)
GAIN ERROR
VS.
TEMPERATURE
MAX5621 toc07
POSITIVE SUPPLY PSRR
VS.
FREQUENCY
MAX5621 toc08
NEGATIVE SUPPLY PSRR
VS.
FREQUENCY
-80
-70
-60
PSRR (dB)
-50
-40
-30
-20
-10
0
0.001
0.01
0.1
1
10
100
MAX5621 toc09
0.05
-90
-80
-70
-60
PSRR (dB)
-90
0.04
GAIN ERROR (%)
0.03
-50
-40
-30
0.02
0.01
CODE = C168 hex
OFFSET CODE = 4F2C hex
0
-40
-15
10
35
60
85
TEMPERATURE (°C)
-20
-10
0
0.01
0.1
1
FREQUENCY (kHz)
10
100
FREQUENCY (kHz)
_______________________________________________________________________________________
5
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