74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
Rev. 05 — 13 January 2010
Product data sheet
1. General description
The 74HC257; 74HCT257 are high-speed Si-gate CMOS devices and are pin compatible
with Low-power Schottky TTL (LSTTL).
The 74HC257 and 74HCT257 have four identical 2-input multiplexers with 3-state outputs,
which select 4 bits of data from two sources and are controlled by a common data select
input (S).
The data inputs from source 0 (1I0 to 4I0) are selected when input S is LOW and the data
inputs from source 1 (1I1 to 4I1) are selected when S is HIGH. Data appears at the
outputs (1Y to 4Y) in true (non-inverting) form from the selected inputs.
The 74HC257 and 74HCT257 are the logic implementation of a 4-pole, 2-position switch,
where the position of the switch is determined by the logic levels applied to S. The outputs
are forced to a high-impedance OFF-state when OE is HIGH.
The logic equations for the outputs are:
1Y
=
OE
• (
1I1
•
S
•
1I0
•
S
)
2Y
=
OE
• (
2I1
•
S
•
2I0
•
S
)
3Y
=
OE
• (
3I1
•
S
•
3I0
•
S
)
4Y
=
OE
• (
4I1
•
S
•
4I0
•
S
)
Except for their non-inverting (true) outputs the 74HC257; 74HCT257 are identical to the
74HC258.
2. Features
Non-inverting data path
3-state outputs interface directly with system bus
Complies with JEDEC standard no. 7A
ESD protection:
HBM JESD22-A114E exceeds 2 000 V
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
−40 °C
to +85
°C
and from
−40 °C
to +125
°C
NXP Semiconductors
74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
3. Ordering information
Table 1.
Ordering information
Package
Temperature range
74HC257N
74HCT257N
74HC257D
74HCT257D
74HC257DB
74HCT257DB
74HC257PW
74HCT257PW
−40 °C
to +125
°C
TSSOP16
−40 °C
to +125
°C
SSOP16
plastic shrink small outline package; 16 leads;
body width 5.3 mm
plastic thin shrink small outline package; 16 leads;
body width 4.4 mm
SOT338-1
SOT403-1
−40 °C
to +125
°C
SO16
plastic small outline package; 16 leads; body width 3.9 mm SOT109-1
−40 °C
to +125
°C
Name
DIP16
Description
plastic dual in-line package; 16 leads (300 mil)
Version
SOT38-4
Type number
4. Functional diagram
1
15
1
2
3
5
6
11
10
14
13
15
1I0
1I1
2I0
2I1
3I0
3I1
4I0
4I1
OE
mga835
G1
EN
S
1Y
4
2
3
5
1
1
MUX
4
2Y
7
7
6
11
9
10
3Y
9
4Y
12
14
12
13
001aad467
Fig 1.
Logic symbol
Fig 2.
IEC logic symbol
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
2 of 17
NXP Semiconductors
74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
2
3
5
6
11
10
14
13
1I0 1I1
2I0 2I1
3I0 3I1
4I0 4I1
1 S
SELECTOR
15 OE
3-STATE MULTIPLEXER OUTPUTS
1Y
4
2Y
7
3Y
9
4Y
12
mgr280
Fig 3.
Functional diagram
1I0
1Y
1I1
2I0
2Y
2I1
3I0
3Y
3I1
4I0
4Y
4I1
OE
S
001aad468
Fig 4.
Logic diagram
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
3 of 17
NXP Semiconductors
74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
5. Pinning information
5.1 Pinning
74HC257
74HCT257
S
1I0
1I1
1Y
2I0
2I1
2Y
GND
1
2
3
4
5
6
7
8
001aad499
16 V
CC
15 OE
14 4I0
13 4I1
12 4Y
11 3I0
10 3I1
9
3Y
Fig 5.
Pin configuration DIP16, SO16, SSOP16 and TSSOP16
5.2 Pin description
Table 2.
Symbol
S
1I0 to 4I0
1I1 to 4I1
1Y to 4Y
GND
OE
V
CC
Pin description
Pin
1
2, 5, 11, 14
3, 6, 10, 13
4, 7, 9, 12
8
15
16
Description
common data select input
data input from source 0
data input from source 1
3-state multiplexer output
ground (0 V)
3-state output enable input (active LOW)
supply voltage
6. Functional description
6.1 Function table
Table 3.
Control
OE
H
L
L
L
L
[1]
Function table
[1]
Input
S
X
H
H
L
L
nl0
X
X
X
L
H
nl1
X
L
H
X
X
Output
nY
Z
L
H
L
H
H = HIGH voltage level; L = LOW voltage level; X = don’t care; Z = high-impedance OFF-state.
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
4 of 17
NXP Semiconductors
74HC257; 74HCT257
Quad 2-input multiplexer; 3-state
7. Limiting values
Table 4.
Limiting values
In accordance with the Absolute Maximum Rating System (IEC 60134). Voltages are referenced to GND (ground = 0 V).
Symbol
V
CC
I
IK
I
OK
I
O
I
CC
I
GND
T
stg
P
tot
Parameter
supply voltage
input clamping current
output clamping current
output current
supply current
ground current
storage temperature
total power dissipation
DIP16 package
SO16 package
SSOP16 package
TSSOP16 package
[1]
[2]
[3]
For DIP16 packages: above 70
°C,
P
tot
derates linearly with 12 mW/K.
For SO16 packages: above 70
°C,
P
tot
derates linearly with 8 mW/K.
For SSOP16 and TSSOP16 packages: above 60
°C,
P
tot
derates linearly with 5.5 mW/K.
[1]
[2]
[3]
[3]
Conditions
V
I
<
−0.5
V or
V
I
> V
CC
+ 0.5 V
V
O
<
−0.5
V or
V
O
> V
CC
+ 0.5 V
V
O
=
−0.5
V to V
CC
+ 0.5 V
Min
−0.5
-
-
-
-
-
−65
-
-
-
-
Max
+7
±20
±20
±35
+70
−70
+150
750
500
500
500
Unit
V
mA
mA
mA
mA
mA
°C
mW
mW
mW
mW
8. Recommended operating conditions
Table 5.
Symbol
Type 74HC257
V
CC
V
I
V
O
Δt/ΔV
supply voltage
input voltage
output voltage
input transition rise and
fall rates
V
CC
= 2.0 V
V
CC
= 4.5 V
V
CC
= 6.0 V
T
amb
V
CC
V
I
V
O
Δt/ΔV
T
amb
ambient temperature
supply voltage
input voltage
output voltage
input transition rise and
fall rates
ambient temperature
V
CC
= 4.5 V
Type 74HCT257
4.5
0
0
-
−40
5.0
-
-
1.67
-
5.5
V
CC
V
CC
139
+125
V
V
V
ns
°C
2.0
0
0
-
-
-
−40
5.0
-
-
-
1.67
-
-
6.0
V
CC
V
CC
625
139
83
+125
V
V
V
ns
ns
ns
°C
Recommended operating conditions
Parameter
Conditions
Min
Typ
Max
Unit
74HC_HCT257_5
© NXP B.V. 2010. All rights reserved.
Product data sheet
Rev. 05 — 13 January 2010
5 of 17
京公网安备 11010802033920号
EEWORLD
