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74LVC2G32GD

Description
Dual 2-input OR gate
Categorylogic    logic   
File Size80KB,16 Pages
ManufacturerNXP
Websitehttps://www.nxp.com
Environmental Compliance
Download Datasheet Parametric Compare View All

74LVC2G32GD Overview

Dual 2-input OR gate

74LVC2G32GD Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerNXP
Parts packaging codeSON
package instruction3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8
Contacts8
Reach Compliance Codeunknow
seriesLVC/LCX/Z
JESD-30 codeR-PDSO-N8
JESD-609 codee4
length3 mm
Logic integrated circuit typeOR GATE
Humidity sensitivity level1
Number of functions2
Number of entries2
Number of terminals8
Maximum operating temperature125 °C
Minimum operating temperature-40 °C
Package body materialPLASTIC/EPOXY
encapsulated codeVSON
Package shapeRECTANGULAR
Package formSMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius)260
propagation delay (tpd)11 ns
Certification statusNot Qualified
Maximum seat height0.5 mm
Maximum supply voltage (Vsup)5.5 V
Minimum supply voltage (Vsup)1.65 V
Nominal supply voltage (Vsup)3.3 V
surface mountYES
technologyCMOS
Temperature levelAUTOMOTIVE
Terminal surfaceNICKEL PALLADIUM GOLD
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationDUAL
Maximum time at peak reflow temperature30
width2 mm
74LVC2G32
Dual 2-input OR gate
Rev. 07 — 6 June 2008
Product data sheet
1. General description
The 74LVC2G32 provides a 2-input OR gate function.
Inputs can be driven from either 3.3 V or 5 V devices. This feature allows the use of these
devices as translators in a mixed 3.3 V and 5 V environment.
This device is fully specified for partial power-down applications using I
OFF
. The I
OFF
circuitry disables the output, preventing a damaging backflow current through the device
when it is powered down.
2. Features
I
I
I
I
I
I
Wide supply voltage range from 1.65 V to 5.5 V
5 V tolerant outputs in the Power-down mode
High noise immunity
±24
mA output drive (V
CC
= 3.0 V)
CMOS low power consumption
Complies with JEDEC standard:
N
JESD8-7 (1.65 V to 1.95 V)
N
JESD8-5 (2.3 V to 2.7 V)
N
JESD8-B/JESD36 (2.7 V to 3.6 V)
Latch-up performance exceeds 250 mA
Direct interface with TTL levels
Inputs accept voltages up to 5 V
ESD protection:
N
HBM JESD22-A114E exceeds 2000 V
N
MM JESD22-A115-A exceeds 200 V
Multiple package options
Specified from
−40 °C
to +85
°C
and
−40 °C
to +125
°C
I
I
I
I
I
I

74LVC2G32GD Related Products

74LVC2G32GD 74LVC2G32DP 74LVC2G32GM 74LVC2G32_08 74LVC2G32 74LVC2G32DC 74LVC2G32GT
Description Dual 2-input OR gate Dual 2-input OR gate Dual 2-input OR gate Dual 2-input OR gate Dual 2-input OR gate Dual 2-input OR gate Dual 2-input OR gate
Is it lead-free? Lead free Lead free - - - Lead free Lead free
Is it Rohs certified? conform to conform to conform to - - conform to conform to
Parts packaging code SON SOIC QFN - - TSSOP SON
package instruction 3 X 2 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, SOT996-2, SON-8 3 MM, PLASTIC, SOT505-2, TSSOP-8 HVQCCN, LCC8,.06SQ,20 - - 2.30 MM, PLASTIC, MO-187, SOT765-1, VSSOP-8 1 X 1.95 MM, 0.50 MM HEIGHT, 0.50 MM PITCH, PLASTIC, MO-252, SOT833-1, SON-8
Contacts 8 8 8 - - 8 8
Reach Compliance Code unknow compli compli - - compliant compli
series LVC/LCX/Z LVC/LCX/Z LVC/LCX/Z - - LVC/LCX/Z LVC/LCX/Z
JESD-30 code R-PDSO-N8 S-PDSO-G8 S-PQCC-N8 - - R-PDSO-G8 R-PDSO-N8
JESD-609 code e4 e4 e4 - - e4 e3
length 3 mm 3 mm 1.6 mm - - 2.3 mm 1.95 mm
Logic integrated circuit type OR GATE OR GATE OR GATE - - OR GATE OR GATE
Humidity sensitivity level 1 1 1 - - 1 1
Number of functions 2 2 2 - - 2 2
Number of entries 2 2 2 - - 2 2
Number of terminals 8 8 8 - - 8 8
Maximum operating temperature 125 °C 125 °C 125 °C - - 125 °C 125 °C
Minimum operating temperature -40 °C -40 °C -40 °C - - -40 °C -40 °C
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY - - PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code VSON TSSOP HVQCCN - - VSSOP VSON
Package shape RECTANGULAR SQUARE SQUARE - - RECTANGULAR RECTANGULAR
Package form SMALL OUTLINE, VERY THIN PROFILE SMALL OUTLINE, THIN PROFILE, SHRINK PITCH CHIP CARRIER, HEAT SINK/SLUG, VERY THIN PROFILE - - SMALL OUTLINE, VERY THIN PROFILE, SHRINK PITCH SMALL OUTLINE, VERY THIN PROFILE
Peak Reflow Temperature (Celsius) 260 260 260 - - 260 260
propagation delay (tpd) 11 ns 11 ns 11 ns - - 11 ns 11 ns
Certification status Not Qualified Not Qualified Not Qualified - - Not Qualified Not Qualified
Maximum seat height 0.5 mm 1.1 mm 0.5 mm - - 1 mm 0.5 mm
Maximum supply voltage (Vsup) 5.5 V 5.5 V 5.5 V - - 5.5 V 5.5 V
Minimum supply voltage (Vsup) 1.65 V 1.65 V 1.65 V - - 1.65 V 1.65 V
Nominal supply voltage (Vsup) 3.3 V 3.3 V 3.3 V - - 3.3 V 3.3 V
surface mount YES YES YES - - YES YES
technology CMOS CMOS CMOS - - CMOS CMOS
Temperature level AUTOMOTIVE AUTOMOTIVE AUTOMOTIVE - - AUTOMOTIVE AUTOMOTIVE
Terminal surface NICKEL PALLADIUM GOLD NICKEL PALLADIUM GOLD Nickel/Palladium/Gold (Ni/Pd/Au) - - NICKEL PALLADIUM GOLD Tin (Sn)
Terminal form NO LEAD GULL WING NO LEAD - - GULL WING NO LEAD
Terminal pitch 0.5 mm 0.65 mm 0.5 mm - - 0.5 mm 0.5 mm
Terminal location DUAL DUAL QUAD - - DUAL DUAL
Maximum time at peak reflow temperature 30 30 30 - - 30 30
width 2 mm 3 mm 1.6 mm - - 2 mm 1 mm
Load capacitance (CL) - 50 pF 50 pF - - 50 pF 50 pF
MaximumI(ol) - 0.024 A 0.024 A - - 0.024 A 0.024 A
Encapsulate equivalent code - TSSOP8,.16 LCC8,.06SQ,20 - - TSSOP8,.12,20 SOLCC8,.04,20
method of packing - TAPE AND REEL TAPE AND REEL - - TAPE AND REEL TAPE AND REEL
power supply - 3.3 V 3.3 V - - 3.3 V 3.3 V
Schmitt trigger - NO NO - - NO NO
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