2SK3211(L), 2SK3211(S)
Silicon N Channel MOS FET
High Speed Power Switching
REJ03G1091-0400
Rev.4.00
May 15, 2006
Features
•
Low on-resistance
R
DS
= 60 mΩ typ.
•
High speed switching
•
4 V gate drive device can be driven from 5 V source
Outline
RENESAS Package code: PRSS0004AE-A
(Package name: LDPAK(L))
4
4
G
RENESAS Package code: PRSS0004AE-B
(Package name: LDPAK(S)-(1))
D
1. Gate
2. Drain
3. Source
4. Drain
1
1
2
3
2
3
S
Rev.4.00 May 15, 2006 page 1 of 8
2SK3211(L), 2SK3211(S)
Absolute Maximum Ratings
(Ta = 25°C)
Item
Drain to source voltage
Gate to source voltage
Drain current
Drain peak current
Body-drain diode reverse drain current
Avalanche current
Avalanche energy
Channel dissipation
Channel temperature
Storage temperature
Notes: 1. PW
≤
10
µs,
duty cycle
≤
1%
2. Value at Tc = 25
°
C
3. Value at Tch = 25
°
C, Rg
≥
50
Ω
Symbol
V
DSS
V
GSS
I
D
I
D(pulse)Note1
I
DR
I
AP Note3
E
AR Note3
Pch
Note2
Tch
Tstg
Ratings
200
±20
25
100
25
25
41
100
150
–55 to +150
Unit
V
V
A
A
A
A
mJ
W
°
C
°
C
Electrical Characteristics
(Ta = 25°C)
Item
Drain to source breakdown voltage
Gate to source breakdown voltage
Gate to source leak current
Zero gate voltage drain current
Gate to source cutoff voltage
Static drain to source on state
resistance
Forward transfer admittance
Input capacitance
Output capacitance
Reverse transfer capacitance
Turn-on delay time
Rise time
Turn-off delay time
Fall time
Body–drain diode forward voltage
Body–drain diode reverse recovery
time
Note:
4. Pulse test
Symbol
V
(BR)DSS
V
(BR)GSS
I
GSS
I
DSS
V
GS(off)
R
DS(on)
R
DS(on)
|y
fs
|
Ciss
Coss
Crss
t
d(on)
t
r
t
d(off)
t
f
V
DF
t
rr
Min
200
±20
—
—
1.0
—
—
18
—
—
—
—
—
—
—
—
—
Typ
—
—
—
—
—
60
65
30
2420
790
340
20
230
590
330
0.95
230
Max
—
—
±10
10
2.5
75
85
—
—
—
—
—
—
—
—
—
—
Unit
V
V
µA
µA
V
mΩ
mΩ
S
pF
pF
pF
ns
ns
ns
ns
V
ns
Test Conditions
I
D
= 10 mA, V
GS
= 0
I
G
=
±100 µA,
V
DS
= 0
V
GS
=
±16
V, V
DS
= 0
V
DS
= 200 V, V
GS
= 0
I
D
= 1 mA, V
DS
= 10 V
I
D
= 15 A, V
GS
= 10 V
Note4
I
D
= 15 A, V
GS
= 4 V
Note4
I
D
= 15 A, V
DS
= 10 V
Note4
V
DS
= 10 V, V
GS
= 0,
f = 1 MHz
I
D
= 15 A, V
GS
= 10 V,
R
L
= 2
Ω
I
F
= 25 A, V
GS
= 0
I
F
= 25 A, V
GS
= 0
di
F
/ dt = 50 A/
µs
Rev.4.00 May 15, 2006 page 2 of 8
2SK3211(L), 2SK3211(S)
Main Characteristics
Power vs. Temperature Derating
160
1000
Maximum Safe Operation Area
Channel Dissipation Pch (W)
Drain Current I
D
(A)
100
PW
10
120
10
DC
Op
=1
1m
10
µ
s
0
µ
er
80
1
0m
s(
1S
ati
ho
on
t)
(T
c=
25
°C
)
s
s
40
0.1
Operation in
this area is
limited by R
DS (on)
Ta = 25°C
1
3
10
30
100
300
1000
0
0
50
100
150
200
0.01
Case Temperature Tc (°C)
Drain to Source Voltage V
DS
(V)
Typical Output Characteristics
50
10 V
4V
Pulse Test
3.5 V
6V
20
Typical Transfer Characteristics
V
DS
= 10 V
Pulse Test
Drain Current I
D
(A)
30
3V
20
Drain Current I
D
(A)
40
16
12
8
Tc = 75°C
25°C
4
–25°C
10
V
GS
= 2.5 V
0
0
2
4
6
8
10
0
0
1
2
3
4
5
Drain to Source Voltage V
DS
(V)
Drain to Source Saturation Voltage vs.
Gate to Source Voltage
Gate to Source Voltage V
GS
(V)
Static Drain to Source on State Resistance
vs. Drain Current
500
Pulse Test
200
100
50
Drain to Source Saturation Voltage
V
DS (on)
(V)
2.5
Pulse Test
2.0
1.5
Static Drain to Source on State Resistance
R
DS (on)
(mΩ)
V
GS
= 4 V
10 V
1.0
I
D
= 15 A
10 A
0.5
5A
20
10
0
0
4
8
12
16
20
1
2
5
10
20
50
100
Gate to Source Voltage V
GS
(V)
Drain Current I
D
(A)
Rev.4.00 May 15, 2006 page 3 of 8
2SK3211(L), 2SK3211(S)
Static Drain to Source on State
Resistance vs. Temperature
Forward Transfer Admittance
y
fs
(S)
250
Pulse Test
200
50
Tc = –25°C
20
75°C
10
5
2
1
0.5
0.1
V
DS
= 10 V
Pulse Test
Static Drain to Source on State Resistance
R
DS (on)
(mΩ)
Forward Transfer Admittance
vs. Drain Current
25°C
150
V
GS
= 4 V
5,10,15 A
100
5,10,15 A
50
10 V
0
–40
0
40
80
120
160
0.3
1
3
10
30
100
Case Temperature T
C
(°C)
Body to Drain Diode Reverse
Recovery Time
1000
10000
di / dt = 50 A /
µs
V
GS
= 0, Ta = 25°C
5000
Drain Current I
D
(A)
Typical Capacitance
vs. Drain to Source Voltage
Reverse Recovery Time trr (ns)
500
Ciss
Capacitance C (pF)
2000
1000
500
200
100
50
20
10
V
GS
= 0
f = 1 MHz
200
100
50
Coss
Crss
20
10
0.1
0.3
1
3
10
30
100
0
10
20
30
40
50
Reverse Drain Current I
DR
(A)
Drain to Source Voltage V
DS
(V)
Dynamic Input Characteristics
Drain to Source Voltage V
DS
(V)
I
D
= 20 A
V
DD
= 150 V
100 V
50 V
V
GS
Switching Characteristics
Gate to Source Voltage V
GS
(V)
20
1000
500
td(off)
tf
200
160
16
Switching Time t (ns)
200
100
50
td(on)
tr
V
GS
= 10 V,
V
DD
= 30 V
PW = 5
µs,
duty < 1 %
120
12
80
8
40
V
DD
= 150 V
100 V
50 V
4
V
DS
20
10
0.1 0.2
0
40
80
120
160
0
200
0.5
1
2
5
10
20
Gate Charge Qg (nc)
Drain Current I
D
(A)
Rev.4.00 May 15, 2006 page 4 of 8
2SK3211(L), 2SK3211(S)
Reverse Drain Current vs.
Source to Drain Voltage
(A)
20
Maximum Avalanche Energy vs.
Channel Temperature Derating
Repetitive Avalanche Energy E
AR
(mJ)
50
I
AP
= 25 A
V
DD
= 50 V
duty < 0.1 %
Rg > 50
Ω
Pulse Test
Reverse Drain Current I
DR
16
40
12
10 V
8
5V
V
GS
= 0, –5 V
30
20
4
10
0
25
0
0.2
0.4
0.6
0.8
1.0
50
75
100
125
150
Source to Drain Voltage
V
SD
(V)
Channel Temperature Tch (°C)
Normalized Transient Thermal Impedance vs. Pulse Width
Normalized Transient Thermal Impedance
γ
s (t)
3
Tc = 25°C
1
D=1
0.5
0.3
0.2
0.1
0.1
0.05
θ
ch – c(t) =
γ
s (t)
• θ
ch – c
θ
ch – c = 1.25°C/W, Tc = 25°C
PDM
PW
T
0.03
0.02
1
lse
0.0
t pu
ho
1s
D=
PW
T
0.01
10 µ
100 µ
1m
10 m
100 m
1
10
Pulse Width
Avalanche Test Circuit
V
DS
Monitor
L
I
AP
Monitor
PW (S)
Avalanche Waveform
E
AR
=
1
2
•
L
•
I
AP2
•
V
DSS
V
DSS
– V
DD
VV
(BR)DSS
I
AP
Rg
D. U. T
V
DD
V
DS
I
D
Vin
15 V
50
Ω
0
V
DD
Rev.4.00 May 15, 2006 page 5 of 8
京公网安备 11010802033920号
EEWORLD
