M58BW016FT7ZA3F datasheet, PDF

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M58BW016FT7ZA3F: DescriptionM58BW016FT7ZA3F; Categorystorage storage; File Size633KB，70 Pages; ManufacturerSTMicroelectronics; Websitehttp://www.st.com/

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M58BW016FT7ZA3F

M58BW016FT7ZA3F Parametric

Parameter Name	Attribute value
Maker	STMicroelectronics
package instruction	,
Reach Compliance Code	unknown

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M58BW016DB M58BW016DT

M58BW016FT M58BW016FB

16 Mbit (512 Kbit x 32, boot block, burst)

3 V supply Flash memories

Features

■

Supply voltage

– V

= 2.7 V to 3.6 V for program, erase

and read

– V

DDQ

= V

DDQIN

= 2.4 V to 3.6 V for I/O

buffers

– V

= 12 V for fast program (optional)

High performance

– Access times: 70, 80 ns

– 56 MHz effective zero wait-state burst read

– Synchronous burst read

– Asynchronous page read

Hardware block protection

– WP pin for write protect of the 4 outermost

parameter blocks and all main blocks

– RP pin for write protect of all blocks

Optimized for FDI drivers

– Fast program / erase suspend latency

time < 6 µs

– Common Flash interface

Memory blocks

– 8 parameters blocks (top or bottom)

– 31 main blocks

Low power consumption

– 5 µA typical deep power-down

– 60 µA typical standby for M58BW016DT/B

150 µA typical standby for M58BW016FT/B

– Automatic standby after asynchronous read

Electronic signature

– Manufacturer code: 20h

– Top device code: 8836h

– Bottom device code: 8835h

100 K write/erase cycling + 20 years data

retention (minimum)

High reliability level with over 1 M write/erase

cycling sustained

ECOPACK

packages available

■

PQFP80 (T)

■

LBGA

■

LBGA80 10 × 12 mm

■

March 2008

Rev 16

1/70

www.st.com

Contents

M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB

Contents

Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7

1.1

Block protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11

Signal descriptions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

2.1

2.2

2.3

2.4

2.5

2.6

2.7

2.8

2.9

2.10

2.11

2.12

2.13

2.14

2.15

2.16

2.17

2.18

2.19

Address inputs (A0-A18) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Data inputs/outputs (DQ0-DQ31) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Chip Enable (E) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Output Enable (G) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 14

Output Disable (GD) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Write Enable (W) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Reset/Power-down (RP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Latch Enable (L) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15

Burst Clock (K) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Burst Address Advance (B) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Valid Data Ready (R) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Write Protect (WP) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Supply voltage (V

DD)

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16

Output supply voltage (V

DDQ

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Input supply voltage (V

DDQIN

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Program/erase supply voltage (V

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Ground (V

and V

SSQ

) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Don’t use (DU) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Not connected (NC) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17

Bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1

Asynchronous bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

3.1.1

3.1.2

3.1.3

3.1.4

3.1.5

3.1.6

Asynchronous bus read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18

Asynchronous latch controlled bus read . . . . . . . . . . . . . . . . . . . . . . . . 18

Asynchronous page read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Asynchronous bus write . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

Asynchronous latch controlled bus write . . . . . . . . . . . . . . . . . . . . . . . . 19

Output Disable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19

2/70

M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB

3.1.7

3.1.8

3.1.9

3.1.10

Contents

Standby mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Automatic low power mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Power-down mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Electronic signature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

3.2

Synchronous bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

3.2.1

3.2.2

Synchronous burst read . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Synchronous burst read suspend . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

3.3

Burst configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

3.3.1

3.3.2

3.3.3

3.3.4

3.3.5

3.3.6

3.3.7

3.3.8

Read select bit (M15) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

X-Latency bits (M14-M11) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Y-Latency bit (M9) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Valid data ready bit (M8) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Burst type bit (M7) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23

Valid clock edge bit (M6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Wrap burst bit (M3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Burst length bit (M2-M0) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 24

Command interface . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

4.1

4.2

4.3

4.4

4.5

4.6

4.7

4.8

4.9

4.10

Read Memory Array command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Read Electronic Signature command . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Read Query command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28

Read Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Clear Status Register command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29

Block Erase command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Program command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30

Program/Erase Suspend command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Program/Erase Resume command . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31

Set Burst Configuration Register command . . . . . . . . . . . . . . . . . . . . . . . 32

Status register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

5.1

5.2

5.3

5.4

5.5

Program/erase controller status (bit 7) . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Erase suspend status (bit 6) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34

Erase status (bit 5) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

Program status (bit 4) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

status (bit 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 35

3/70

M58BW016DT, M58BW016DB, M58BW016FT, M58BW016FB

List of tables

Table 1.

Table 2.

Table 3.

Table 4.

Table 5.

Table 6.

Table 7.

Table 8.

Table 9.

Table 10.

Table 11.

Table 12.

Table 13.

Table 14.

Table 15.

Table 16.

Table 17.

Table 18.

Table 19.

Table 20.

Table 21.

Table 22.

Table 23.

Table 24.

Table 25.

Table 26.

Table 27.

Table 28.

Table 29.

Table 30.

Table 31.

Signal names . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 9

M58BW016DT and M58BW016FT top boot block addresses . . . . . . . . . . . . . . . . . . . . . . 12

M58BW016DB and M58BW016FB bottom boot block addresses . . . . . . . . . . . . . . . . . . . 13

Asynchronous bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20

Asynchronous read electronic signature operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21

Synchronous burst read bus operations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22

Burst configuration register . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25

Burst type definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26

Commands . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32

Program, erase times and program, erase endurance cycles . . . . . . . . . . . . . . . . . . . . . . 33

Status register bits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36

Absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37

Operating and AC measurement conditions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38

Device capacitance. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39

DC characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40

Asynchronous bus read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 41

Asynchronous latch controlled bus read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . 42

Asynchronous page read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43

Asynchronous write and latch controlled write AC characteristics . . . . . . . . . . . . . . . . . . . 46

Synchronous burst read AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48

Power supply AC and DC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

Reset, power-down and power-up AC characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . 51

PQFP80 - 80 lead plastic quad flat pack, package mechanical data . . . . . . . . . . . . . . . . . 53

LBGA80 10 × 12 mm - 8 × 10 active ball array, 1 mm pitch, package mechanical data . . 54

Ordering information scheme . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 55

Query structure overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

CFI - query address and data output . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 56

CFI - device voltage and timing specification . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Device geometry definition . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 57

Extended query information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 58

Document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 68

5/70

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Shortcut: A0 A1 A2 A3 A4 A5 A6 A7 A8 A9 AA AB AC AD AE AF AG AH AI AJ AK AL AM AN AO AP AQ AR AS AT AU AV AW AX AY AZ B0 B1 B2 B3 B4 B5 B6 B7 B8 B9 BA BB BC BD BE BF BG BH BI BJ BK BL BM BN BO BP BQ BR BS BT BU BV BW BX BY BZ C0 C1 C2 C3 C4 C5 C6 C7 C8 C9 CA CB CC CD CE CF CG CH CI CJ CK CL CM CN CO CP CQ CR CS CT CU CV CW CX CY CZ D0 D1 D2 D3 D4 D5 D6 D7 D8 D9 DA DB DC DD DE DF DG DH DI DJ DK DL DM DN DO DP DQ DR DS DT DU DV DW DX DZ

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