MICRF001BMTR datasheet, PDF - EEWORLD Datasheet

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MICRF001BMTR: DescriptionConsumer Circuit, PDSO14, SOIC-14; CategoryOther integrated circuit (IC) Consumption circuit; File Size113KB，9 Pages; ManufacturerMicrel ( Microchip ); Websitehttps://www.microchip.com

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MICRF001BMTR Overview

Consumer Circuit, PDSO14, SOIC-14

MICRF001BMTR Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Micrel ( Microchip )
Parts packaging code	SOIC
package instruction	SOIC-14
Contacts	14
Reach Compliance Code	not_compliant
Commercial integrated circuit types	CONSUMER CIRCUIT
JESD-30 code	R-PDSO-G14
JESD-609 code	e0
length	8.65 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.75 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm

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MICRF001

QwikRadio

Receiver/Data Demodulator

Advance Information

General Description

The MICRF001 is a single chip OOK (ON-OFF Keyed) Receiver

IC for remote wireless applications, employing Micrel’s latest

QwikRadio

technology. This device is a true “antenna-in, data-

out” monolithic device. All RF and IF tuning is accomplished

automatically within the IC, which eliminates manual tuning, and

reduces production costs. Receiver functions are completely

integrated. The result is a highly reliable yet extremely low cost

solution for high volume wireless applications. Because the

MICRF001 is a true single-chip radio receiver, it is extremely

easy to apply, minimizing design and production costs, and

improving time to market.

The MICRF001 uses a novel architecture that allows the

receiver to demodulate signals over a wide RF band, which

eliminates the need for manual tuning. This also significantly

relaxes the frequency accuracy and stability requirements of the

Transmitter, allowing the MICRF001 to be compatible with both

SAW-based and LC-based transmitters. The receiver sensitivity

and selectivity are sufficient to provide low bit error rates for

decode ranges over 100 meters, equaling the performance of

other more expensive solutions.

All tuning and alignment are accomplished on-chip by a low-cost

ceramic resonator or with an externally supplied clock reference.

Initial tolerance requirements on the ceramic resonator or

external clock is a modest ±0.5%. The MICRF001 performance

is insensitive to data modulation duty cycle. The MICRF001

may be used with such coding schemes as Manchester or

33/66% PWM.

All post-detection (demodulator) data filtering is provided on the

MICRF001, so no external filters need to be designed. Any one

of four filter bandwidths may be selected externally by the user.

Bandwidths range from 0.6kHz to 4.8kHz in binary steps

Features

•

Complete UHF receiver on a monolithic chip

Frequency range 300 to 440 MHz

Typical range over 100 meters with monopole

antenna

Data rates to 4.8kbps

Automatic tuning, no manual adjustment

No Filters or Inductors required

Very low RF re-radiation at the antenna

Direct CMOS logic interface to standard decoder

and microprocessor ICs

Extremely low external part count

Applications

•

Keyless Entry

Security Systems

Remote Fan/Light Control

Garage Door Openers

Typical Operating Circuit

387 MHz, 1200 BAUD OOK RECEIVER

Micrel Inc. • 1849 Fortune Drive San Jose, Ca 95131 • USA • tel + 1 (408) 944-0800 • fax + 1 (408) 944-0970 • http://www.micrel.com

MICRF001

QwikRadio

Micrel

Ordering Information

Part Number

MICRF001BN

MICRF001BM

Pin Configuration (DIP and SOIC)

Temperature Range

-40°C to +85°C

Package

14-Pin DIP

14-Pin SOIC

Figure 1

Pin Description

Pin Number

2/3

Pin Name

SEL0

VSSRF

Pin Function

Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1.

This pin is the ground return for the RF section of the IC. The bypass capacitor connected from VDDRF to

VSSRF should have the shortest possible lead length. For best performance, connect VSSRF to VSSBB

at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path).

This is the receive RF input, internally ac-coupled. Connect this pin to the receive antenna. Input

impedance is high (FET gate) with approximately 2pF of shunt (parasitic) capacitance. For applications

located in high ambient noise environments, a fixed value band-pass network may be connected between

the ANT pin and VSSRF to provide additional receive selectivity and input overload protection. (See

“Application Note 22, MICRF001 Theory of Operation”.)

This pin is the positive supply input for the RF section of the IC. VDDBB and VDDRF should be connected

directly at the IC pins. Connect a low ESL, low ESR decoupling capacitor from this pin to VSSRF, as short

as possible.

This pin is the positive supply input for the baseband section of the IC. VDDBB and VDDRF should be

connected directly at the IC pins.

This capacitor extracts the (DC) average value from the demodulated waveform, which becomes the

reference for the internal data slicing comparator. Treat this as a low-pass RC filter with source impedance

described in Table 1 . (See

“Application Note 22, MICRF001 Theory of Operation”,

section 6.4). A

standard

20% X7R ceramic capacitor is generally sufficient.

Output data pin. CMOS level compatible.

This is the ground return for the baseband section of the IC. The bypass and output capacitors connected

to VSSBB should have the shortest possible lead lengths. For best performance, connect VSSRF to

VSSBB at the power supply only (i.e., keep VSSBB currents from flowing through VSSRF return path).

Integrating capacitor for on-chip receive AGC. The Decay/Attack time-constant (TC) ratio is nominally set

as 10:1. CAGC = 10(Attack Time Constant)

µF.

A standard

20% X7R ceramic capacitor is generally

sufficient.

Programs desired Demodulator Filter Bandwidth. This pin in internally pulled-up to VDD. See Table 1.

This is the timing reference for on-chip tuning and alignment. Either connect a ceramic resonator between

this pin and VSSBB, or drive the input with an AC coupled 0.5Vpp input clock. Use ceramic resonators

without integral capacitors. See

“Application Note 22, MICRF001 Theory of Operation”

for details on

frequency selection and accuracy.

This logic pin controls the operating mode of the MICRF001. When SWEN = HIGH, the MICRF001 is in

SWP mode. This is the normal (default) mode of the device. When SWEN = LOW, the device operates as

a conventional single-conversion superheterodyne receiver. (See

“Application Note 22, MICRF001 Theory

of Operation”

for details.) This pin is internally pulled-up to VDD.

ANT

VDDRF

VDDBB

CTH

9/10

VSSBB

CAGC

SEL1

REFOSC

SWEN

October 1998

MICRF001

MICRF001BMTR Related Products

	MICRF001BMTR
Description	Consumer Circuit, PDSO14, SOIC-14
Is it Rohs certified?	incompatible
Maker	Micrel ( Microchip )
Parts packaging code	SOIC
package instruction	SOIC-14
Contacts	14
Reach Compliance Code	not_compliant
Commercial integrated circuit types	CONSUMER CIRCUIT
JESD-30 code	R-PDSO-G14
JESD-609 code	e0
length	8.65 mm
Humidity sensitivity level	1
Number of functions	1
Number of terminals	14
Maximum operating temperature	85 °C
Minimum operating temperature	-40 °C
Package body material	PLASTIC/EPOXY
encapsulated code	LSOP
Package shape	RECTANGULAR
Package form	SMALL OUTLINE, LOW PROFILE
Peak Reflow Temperature (Celsius)	240
Certification status	Not Qualified
Maximum seat height	1.6 mm
Maximum supply voltage (Vsup)	5.5 V
Minimum supply voltage (Vsup)	4.75 V
surface mount	YES
Temperature level	INDUSTRIAL
Terminal surface	Tin/Lead (Sn85Pb15)
Terminal form	GULL WING
Terminal pitch	1.27 mm
Terminal location	DUAL
Maximum time at peak reflow temperature	30
width	3.9 mm

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