EEWORLDEEWORLDEEWORLD

Part Number

Search

531DB121M000DGR

Description
CMOS/TTL Output Clock Oscillator, 121MHz Nom, ROHS COMPLIANT, SMD, 6 PIN
CategoryPassive components    oscillator   
File Size215KB,12 Pages
ManufacturerSilicon Laboratories Inc
Environmental Compliance  
Download Datasheet Parametric View All

531DB121M000DGR Overview

CMOS/TTL Output Clock Oscillator, 121MHz Nom, ROHS COMPLIANT, SMD, 6 PIN

531DB121M000DGR Parametric

Parameter NameAttribute value
Is it lead-free?Lead free
Is it Rohs certified?conform to
MakerSilicon Laboratories Inc
Reach Compliance Codeunknown
Other featuresTAPE AND REEL
maximum descent time0.35 ns
Frequency Adjustment - MechanicalNO
frequency stability20%
JESD-609 codee4
Manufacturer's serial number531
Installation featuresSURFACE MOUNT
Nominal operating frequency121 MHz
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
Oscillator typeCMOS/TTL
physical size7.0mm x 5.0mm x 1.85mm
longest rise time0.35 ns
Maximum supply voltage3.63 V
Minimum supply voltage2.97 V
Nominal supply voltage3.3 V
surface mountYES
maximum symmetry55/45 %
Terminal surfaceNickel/Gold (Ni/Au)
S i 5 3 0 / 5 31
R
EVISION
D
C
R Y S TA L
O
S C I L L A T O R
(XO)
(10 M H
Z T O
1.4 G H
Z
)
Features
Available with any-rate output
frequencies from 10 MHz to 945 MHz
and select frequencies to 1.4 GHz
3rd generation DSPLL
®
with superior
jitter performance
3x better frequency stability than
SAW-based oscillators
Internal fixed crystal frequency
ensures high reliability and low
aging
Available CMOS, LVPECL,
LVDS, and CML outputs
3.3, 2.5, and 1.8 V supply options
Industry-standard 5 x 7 mm
package and pinout
Pb-free/RoHS-compliant
Si5602
Ordering Information:
See page 7.
Applications
SONET/SDH
Networking
SD/HD video
Test and measurement
Clock and data recovery
FPGA/ASIC clock generation
Pin Assignments:
See page 6.
(Top View)
NC
OE
GND
1
2
3
6
5
4
V
DD
Description
The Si530/531 XO utilizes Silicon Laboratories’ advanced DSPLL circuitry
to provide a low jitter clock at high frequencies. The Si530/531 is available
with any-rate output frequency from 10 to 945 MHz and select frequencies to
1400 MHz. Unlike a traditional XO, where a different crystal is required for
each output frequency, the Si530/531 uses one fixed crystal to provide a
wide range of output frequencies. This IC based approach allows the crystal
resonator to provide exceptional frequency stability and reliability. In addition,
DSPLL clock synthesis provides superior supply noise rejection, simplifying
the task of generating low jitter clocks in noisy environments typically found in
communication systems. The Si530/531 IC based XO is factory configurable
for a wide variety of user specifications including frequency, supply voltage,
output format, and temperature stability. Specific configurations are factory
programmed at time of shipment, thereby eliminating long lead times
associated with custom oscillators.
®
CLK–
CLK+
Si530 (LVDS/LVPECL/CML)
OE
NC
GND
1
2
3
6
5
4
V
DD
Functional Block Diagram
V
DD
CLK– CLK+
NC
CLK
Si530 (CMOS)
Fixed
Frequency
XO
Any-rate
10–1400 MHz
DSPLL
®
Clock
Synthesis
OE
NC
GND
1
2
3
6
5
4
V
DD
CLK–
CLK+
Si531 (LVDS/LVPECL/CML)
OE
GND
Rev. 1.1 6/07
Copyright © 2007 by Silicon Laboratories
Si530/531
How to operate the optical drive under CE?
As the title says, I want to use EVC programming to operate the optical drive under CE....
qinxuewei101 Embedded System
Why is it useless to download Guo Tianxiang's program to my development board?
I bought this development board on Taobao last year and left it there untouched. Recently I wanted to learn, so I took it out to have a look. There is a detailed introduction of this development board...
spawm MCU
C/C++ Programming of TMS320C6X
[size=4]The development environment of TMS320C6X is similar to that of general microprocessors, including C optimizing compiler, programming interface, C/assembly language program debugger, software s...
Jacktang DSP and ARM Processors
EEWORLD University Hall ---- Industrial innovation applications based on DLP
Industrial innovation applications based on DLP : https://training.eeworld.com.cn/course/5241...
hi5 Talking
How to extract the data stored in RAM after ADC10 conversion using DTC?
I am using a G2553 chip. I use DTC to convert a single channel multiple times and store the data in RAM. Now I want to extract the contents in RAM. What method should I use? Suppose the array takes th...
taotiezh Microcontroller MCU
About the test of Gaoyun Yunyuan software ERROR (PA2050): Module 'xx' is instantiated but n...
Because I participated in the evaluation of the GW1N FPGA, the plan at that time was to use GW1N to collect data from the 24-bit ADC LTC2380-24 and then analyze it, but I don't know where the LTC2380-...
littleshrimp Domestic Chip Exchange

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1737  2914  1245  2581  842  35  59  26  52  17 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号