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MAX5865ETM+TD

Description
Codec, 2-Channel, CMOS, PQCC48
CategoryWireless rf/communication    Telecom circuit   
File Size2MB,26 Pages
ManufacturerMaxim
Websitehttps://www.maximintegrated.com/en.html
Environmental Compliance
Download Datasheet Parametric Compare View All

MAX5865ETM+TD Overview

Codec, 2-Channel, CMOS, PQCC48

MAX5865ETM+TD Parametric

Parameter NameAttribute value
Is it Rohs certified?conform to
MakerMaxim
package instructionQCCN, LCC48,.27SQ,20
Reach Compliance Codecompliant
Analog input maximum value1.5 V
input typeDIFFERENTIAL
JESD-30 codeS-PQCC-N48
JESD-609 codee3
Number of channels2
Number of terminals48
Maximum operating temperature85 °C
Minimum operating temperature-40 °C
outputVOLTAGE
output codeOFFSET BINARY
Maximum output voltage3 V
Package body materialPLASTIC/EPOXY
encapsulated codeQCCN
Encapsulate equivalent codeLCC48,.27SQ,20
Package shapeSQUARE
Package formCHIP CARRIER
power supply1.8,3.3 V
Certification statusNot Qualified
resolution8 µm
surface mountYES
technologyCMOS
Temperature levelINDUSTRIAL
Terminal surfaceMatte Tin (Sn)
Terminal formNO LEAD
Terminal pitch0.5 mm
Terminal locationQUAD
19-2916; Rev 1; 10/03
KIT
ATION
EVALU
E
BL
AVAILA
Ultra-Low-Power, High-Dynamic-
Performance, 40Msps Analog Front End
General Description
Features
o
Integrated Dual 8-Bit ADCs and Dual 10-Bit DACs
o
Ultra-Low Power
75.6mW at f
CLK
= 40MHz (Transceiver Mode)
64mW at f
CLK
= 22MHz (Transceiver Mode)
Low-Current Idle and Shutdown Modes
o
Excellent Dynamic Performance
48.4dB SINAD at f
IN
= 5.5MHz (ADC)
70dB SFDR at f
OUT
= 2.2MHz (DAC)
o
Excellent Gain/Phase Match
±0.2°
Phase,
±0.05dB
Gain at f
IN
= 5.5MHz (ADC)
o
Internal/External Reference Option
o
+1.8V to +3.3V Digital Output Level (TTL/CMOS
Compatible)
o
Multiplexed Parallel Digital Input/Output for
ADCs/DACs
o
Miniature 48-Pin Thin QFN Package (7mm
7mm)
o
Evaluation Kit Available (Order MAX5865EVKIT)
MAX5865
The MAX5865 ultra-low-power, highly integrated analog
front end is ideal for portable communication equipment
such as handsets, PDAs, WLAN, and 3G wireless termi-
nals. The MAX5865 integrates dual 8-bit receive ADCs
and dual 10-bit transmit DACs while providing the high-
est dynamic performance at ultra-low power. The ADCs’
analog I-Q input amplifiers are fully differential and
accept 1V
P-P
full-scale signals. Typical I-Q channel
phase matching is
±0.2°
and amplitude matching is
±0.05dB.
The ADCs feature 48.4dB SINAD and 70dBc
spurious-free dynamic range (SFDR) at f
IN
= 5.5MHz and
f
CLK
= 40MHz. The DACs’ analog I-Q outputs are fully
differential with
±400mV
full-scale output, and 1.4V com-
mon-mode level. Typical I-Q channel phase matching is
±0.15°
and gain matching is
±0.05dB.
The DACs also
feature dual 10-bit resolution with 72dBc SFDR, and
57dB SNR at f
OUT
= 2.2MHz and f
CLK
= 40MHz.
The ADCs and DACs operate simultaneously or indepen-
dently for frequency-division duplex (FDD) and time-divi-
sion duplex (TDD) modes. A 3-wire serial interface
controls power-down and transceiver modes of opera-
tion. The typical operating power is 75.6mW at f
CLK
=
40Msps with the ADCs and DACs operating simultane-
ously in transceiver mode. The MAX5865 features an
internal 1.024V voltage reference that is stable over the
entire operating power-supply range and temperature
range. The MAX5865 operates on a +2.7V to +3.3V ana-
log power supply and a +1.8V to +3.3V digital I/O power
supply for logic compatibility. The quiescent current is
8.5mA in idle mode and 1µA in shutdown mode. The
MAX5865 is specified for the extended (-40°C to +85°C)
temperature range and is available in a 48-pin thin QFN
package.
Functional Diagram
IA+
IA-
QA+
QA-
ADC
ADC
OUTPUT
MUX
ADC
DA0–DA7
Applications
Narrowband/Wideband CDMA Handsets
and PDAs
Fixed/Mobile Broadband Wireless Modems
3G Wireless Terminals
CLK
ID+
ID-
QD+
QD-
REFP
COM
REFN
REFIN
REF AND
BIAS
DAC
DAC
INPUT
MUX
DAC
DD0–DD9
Ordering Information
PART
MAX5865ETM
MAX5865E/D
TEMP RANGE
-40°C to +85°C
-40°C to +85°C
PIN-PACKAGE
48 Thin QFN-EP*
(7mm x 7mm)
Dice**
SERIAL
INTERFACE
AND SYSTEM
CONTROL
DIN
SCLK
CS
*EP
= Exposed paddle.
**Contact
factory for dice specifications.
Pin Configuration appears at end of data sheet.
MAX5865
________________________________________________________________
Maxim Integrated Products
1
For pricing, delivery, and ordering information, please contact Maxim/Dallas Direct! at
1-888-629-4642, or visit Maxim’s website at www.maxim-ic.com.

MAX5865ETM+TD Related Products

MAX5865ETM+TD MAX5865ETM+D MAX5865ETM-TD MAX5865ETM-D
Description Codec, 2-Channel, CMOS, PQCC48 Codec, 2-Channel, CMOS, PQCC48 Codec, 2-Channel, CMOS, PQCC48 Codec, 2-Channel, CMOS, PQCC48
Is it Rohs certified? conform to conform to incompatible incompatible
Maker Maxim Maxim Maxim Maxim
Reach Compliance Code compliant compliant not_compliant not_compliant
Analog input maximum value 1.5 V 1.5 V 1.5 V 1.5 V
input type DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL DIFFERENTIAL
JESD-30 code S-PQCC-N48 S-PQCC-N48 S-PQCC-N48 S-PQCC-N48
JESD-609 code e3 e3 e0 e0
Number of channels 2 2 2 2
Number of terminals 48 48 48 48
Maximum operating temperature 85 °C 85 °C 85 °C 85 °C
Minimum operating temperature -40 °C -40 °C -40 °C -40 °C
output VOLTAGE VOLTAGE VOLTAGE VOLTAGE
output code OFFSET BINARY OFFSET BINARY OFFSET BINARY OFFSET BINARY
Maximum output voltage 3 V 3 V 3 V 3 V
Package body material PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY PLASTIC/EPOXY
encapsulated code QCCN QCCN QCCN QCCN
Encapsulate equivalent code LCC48,.27SQ,20 LCC48,.27SQ,20 LCC48,.27SQ,20 LCC48,.27SQ,20
Package shape SQUARE SQUARE SQUARE SQUARE
Package form CHIP CARRIER CHIP CARRIER CHIP CARRIER CHIP CARRIER
power supply 1.8,3.3 V 1.8,3.3 V 1.8,3.3 V 1.8,3.3 V
Certification status Not Qualified Not Qualified Not Qualified Not Qualified
resolution 8 µm 8 µm 8 µm 8 µm
surface mount YES YES YES YES
technology CMOS CMOS CMOS CMOS
Temperature level INDUSTRIAL INDUSTRIAL INDUSTRIAL INDUSTRIAL
Terminal surface Matte Tin (Sn) Matte Tin (Sn) Tin/Lead (Sn/Pb) Tin/Lead (Sn85Pb15)
Terminal form NO LEAD NO LEAD NO LEAD NO LEAD
Terminal pitch 0.5 mm 0.5 mm 0.5 mm 0.5 mm
Terminal location QUAD QUAD QUAD QUAD
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