GENERAL PURPOSE
DUAL-GATE GaAs MESFET
FEATURES
• SUITABLE FOR USE AS RF AMPLIFIER AND
MIXER IN UHF APPLICATIONS
• LOW CRSS:
0.02 pF (TYP)
• HIGH GPS:
20 dB (TYP) AT 900 MHz
• LOW NF:
1.1 dB TYP AT 900 MHz
• L
G1
= 1.0
µm,
L
G2
= 1.5
µm,
W
G
= 800
µm
• ION IMPLANTATION
• AVAILABLE IN TAPE & REEL OR BULK
Power Gain, G
PS
(dB)
NE25339
POWER GAIN AND NOISE FIGURE vs.
DRAIN TO SOURCE VOLTAGE
V
GS
= 1 V, I
DS
= 10 mA, f = 900 MHz
20
G
PS
10
10
5
NF
0
0
0
5
10
DESCRIPTION
The NE253 is an 800
µm
dual gate GaAs FET designed to
provide flexibility in its application as a mixer, AGC amplifier,
or low noise amplifier. As an example, by shorting the second
gate to the source, higher gain can be realized than with single
gate MESFETs. This device is available in a mini-mold (sur-
face mount) package.
Drain to Source Voltage, V
DS
(V)
ELECTRICAL CHARACTERISTICS
(T
A
= 25°C)
PART NUMBER
PACKAGE OUTLINE
SYMBOL
NF
G
PS
BV
DSX
I
DSS
V
G1S (OFF)
V
G2S (OFF)
I
G1SS
I
G2SS
|Y
FS
|
C
ISS
C
RSS
PARAMETERS AND CONDITIONS
Noise Figure at V
DS
= 5 V, V
G2S
= 1 V, I
D
= 10 mA,
f = 900 MHz
Power Gain at V
DS
= 5 V, V
G2S
= 1 V, I
DS
= 10 mA,
f = 900 MHz
Drain to Source Breakdown Voltage at V
G1S
= -4 V,
V
G2S
= 0, I
DS
= 20
µA
Saturated Drain Current at V
DS
= 5 V, V
G2S
= 0 V, V
G1S
= 0 V
Gate 1 to Source Cutoff Voltage at V
DS
= 5 V,
V
G2S
= 0 V, I
D
= 100
µA
Gate 2 to Source Cutoff Voltage at V
DS
= 5 V,
V
G1S
= 0 V, I
D
= 100
µA
Gate 1 Reverse Current at V
DS
= 0, V
G1S
= -4V, V
G2S
= 0
Gate 2 Reverse Current at V
DS
= 0. V
G2S
= -4V, V
G1S
= 0
Forward Transfer Admittance at V
DS
= 5 V, V
G2S
= 1 V,
I
DS
= 10 mA, f = 1.0 kHz
Input Capacitance at V
DS
= 5 V, V
G2S
= 1 V, I
D
= 10 mA,
f = 1 MHz
Reverse Transfer Capacitance at V
DS
= 5 V, V
G2S
= 1 V,
I
DS
= 10 mA, f = 1 MHz
UNITS
dB
dB
V
mA
V
V
µA
µA
mS
pF
pF
25
1.0
35
1.5
0.02
2.0
0.035
16
10
10
40
80
-3.5
-3.5
10
10
MIN
NE25339
39
TYP
1.1
20
MAX
2.5
California Eastern Laboratories
Noise Figure, NF (dB)
NE25339
ABSOLUTE MAXIMUM RATINGS
1
(T
A
= 25°C)
SYMBOLS
V
DSX
V
G1S
V
G2S
I
D
T
CH
T
STG
P
T
PARAMETERS
Drain to Source Voltage
Gate 1 to Source Voltage
Gate 2 to Source Voltage
Drain Current
Channel Temperature
Storage Temperature
Total Power Dissipation
UNITS
V
V
V
mA
°C
°C
mW
RATINGS
10
-4.5
-4.5
80
125
-55 to +125
200
Note:
1. Operation in excess of any one of these parameters may result
in permanent damage.
TYPICAL PERFORMANCE CURVES
(T
A
= 25°C)
TOTAL POWER DISSIPATION vs.
AMBIENT TEMPERATURE
250
100
DRAIN CURRENT vs.
GATE 1 TO SOURCE VOLTAGE
V
DS
= 5 V
V
G2S
= 1 V
Total Power Dissipation, P
T
(mW)
FREE
AIR
Drain Current, I
D
(mA)
200
0.5 V
150
50
0V
100
-0.5 V
50
-1.0 V
0
0
25
50
75
100
125
0
1.8
-1.2
-0.6
0
+0.6
+1.2
Ambient Temperature, T
A
(°C)
Gate 1 to Source Voltage, V
G1S
(V)
FORWARD TRANSFER ADMITTANCE vs.
GATE 1 TO SOURCE VOLTAGE
FORWARD TRANSFER ADMITTANCE vs.
DRAIN CURRENT
Forward Transfer Admittance, |Y
FS
| mS
V
DS
= 5 V
f = 1 kHz
Forward Transfer Admittance, |Y
FS
| mS
80
80
V
DS
= 5 V
f = 1kHz
40
V
G2S
= 1 V
40
V
GS2
=1V
0.5 V
0V
0.5 V
0
0
-1.8
-1.2
-0.6
0
-0.5 V
+0.6
+1.2
0
0
-0.5 V
50
100
Gate 1 to Source Voltage, V
G1S
(V)
Drain Current, I
D
(mA)
NE25339
TYPICAL PERFORMANCE CURVES
(T
A
= 25°C)
INPUT CAPACITANCE vs.
GATE 2 TO SOURCE VOLTAGE
2.0
30
G
PS
POWER GAIN AND NOISE FIGURE vs.
GATE 2 TO SOURCE VOLTAGE
10
Input Capacitance, C
ISS
(pF)
V
G1S
= 1 V at I
D
= mA
15
Power Gain, G
PS
(dB)
V
G1S
= 1 V at I
D
= 5 mA
0
5
-15
1.0
-30
NF
V
DS
= 5 V
f = 1 kHz
0
-1.0
0
+1.0
-45
-3.0
-2.0
-1.0
0
+1.0
0
+2.0
Gate 2 to Source Voltage, V
G2S
(V)
Gate 2 to Source Voltage, V
G2S
(V)
POWER GAIN AND NOISE FIGURE vs.
DRAIN CURRENT
25
G
PS
10
Power Gain, G
PS
(dB)
15
V
DS
= 5 V
V
G2S
= 1 V
f = 900 MHz
5
10
5
NF
0
0
5
10
0
Drain Current, I
D
(mA)
TEST CIRCUIT DIAGRAM
900 MHz G
PS
and NF TEST CIRCUIT
V
G2S
(1 V)
1000pF
47 kΩ
1000 pF
UP TO 10 pF
INPUT
50
Ω
UP TO
10 pF
L
1
47 kΩ
G
2
UP TO
10 pF
L2
RFC
UP TO 10 pF
D
G
1
S
OUTPUT
50
Ω
1000pF
1000pF
L
1
, L
2
, 35 X 5 X 0.2 mm
Note: I
DS
= 10 mA
V
G1S
V
DD
(5 V)
Noise Figure, NF (dB)
20
Noise Figure, NF (dB)
NE25339
SCHEMATIC
PORT
Pdrain
port = 2
CAP
CpkgG2D
C = 0.15
IND
Ld
L = 1.30e-02
RES
Rd
R = 4.50
CAP
Cg2d
C = 0.15
PORT
P1
port = 3
IND
Lg2
L = 2.50
RES
Rg2
R = 0.2
EEFET3
FET2
UGW=800
N=4
FILE=720 m_t.mdif
MODE=nonlinear
CAP
CpkgDS
C = 0.21
CAP
CpkgG1G2
C = 0.21
CAP
Cg1d
C = 4.30e-02
IND
Lg1
L = 1.00e-02
RES
R12
R = 0.10
EEFET3
FET1
UGW=800
N=4
FILE=720 m_b.mdif
MODE=nonlinear
PORT
Pgate1
port = 1
RES
Rg1
R = 0.2
CAP
Cg1s
C = 1.00e-02
CAP
Cg2s
C = 0.25
RES
Rs
R = 5.30
IND
Ls
L=3
CAP
CpkgG1S
C = 0.15
UNITS
Parameter
capacitance
inductance
resistance
Units
picofarads
nanohenries
ohms
PORT
P4
port = 4
NOTES:
1. This UGW value scales the model parameters on page 1.
2. This N value is the number of gate fingers and scales the
model parameters on page 1.
Frequency:
Bias:
0.1 to 1.5 GHz
V
DS
= 3 V, Vg
1
s= -1.45 V, Vg
2
s= 1 V, I
D
= 3 mA
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