2N6782
Data Sheet
November 1998
File Number
1592.2
3.5A, 100V, 0.600 Ohm, N-Channel Power
MOSFET
The 2N6782 is an N-Channel enhancement mode silicon
gate power field effect transistor designed for applications
such as switching regulators, switching converters, motor
drivers, relay drivers, and drivers for high power bipolar
switching transistors requiring high speed and low gate drive
power. This type can be operated directly from integrated
circuits.
Features
• 3.5A, 100V
• r
DS(ON)
= 0.600
Ω
• SOA is Power Dissipation Limited
• Nanosecond Switching Speeds
• Linear Transfer Characteristics
• High Input Impedance
• Majority Carrier Device
Ordering Information
PART NUMBER
2N6782
PACKAGE
TO-205AF
BRAND
2N6782
• Related Literature
- TB334 “Guidelines for Soldering Surface Mount
Components to PC Boards”
NOTE: When ordering, use the entire part number.
Symbol
D
G
S
Packaging
JEDEC TO-205AF
DRAIN
(CASE)
SOURCE
GATE
©2001 Fairchild Semiconductor Corporation
2N6782 Rev. A
2N6782
Absolute Maximum Ratings
T
C
= 25
o
C, Unless Otherwise Specified
2N6782
100
100
3.5
2.25
14
±
20
3.5
14
15
0.12
-55 to 150
300
260
UNITS
V
V
A
A
A
V
A
A
W
W/
o
C
o
C
o
C
o
C
Drain to Source Breakdown Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
DS
Drain to Gate Voltage (R
GS
= 20k
Ω)
(Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .V
DGR
Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .I
D
T
C
= 100
o
C . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Pulsed Drain Current (Notes 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
DM
Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . V
GS
Continuous Source Current (Body Diode) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
S
Pulse Source Current (Body Diode). . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . I
SM
Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . P
D
Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .
Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
J,
T
STG
Maximum Temperature for Soldering
Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . T
L
Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .T
pkg
CAUTION: Stresses above those listed in “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress only rating and operation of the
device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE:
1. T
J
= 25
o
C to 125
o
C.
Electrical Specifications
PARAMETER
T
C
= 25
o
C, Unless Otherwise Specified
SYMBOL
BV
DSS
V
GS(TH)
I
DSS
V
DS(ON)
I
GSS
r
DS(ON)
V
SD
gfs
t
d(ON)
t
r
t
d(OFF)
t
f
C
ISS
C
OSS
C
RSS
R
θ
JC
R
θ
JA
SOA
Free Air Operation
V
DS
= 80V, I
D
= 188mA
V
DS
= 4.28V, I
D
= 3.5A
V
DS
= 25V, V
GS
= 0V, f = 1MHz
(Figure 11)
TEST CONDITIONS
I
D
= 0.25mA, V
GS
= 0V
V
GS
= V
DS
, I
D
= 0.5mA
V
DS
= 100V, V
GS
= 0V
V
DS
= 80V, V
GS
= 0V T
C
= 125
o
C
I
D
= 3.5A, V
GS
= 10V
V
GS
=
±
20V
I
D
= 2.25A, V
GS
= 10V
I
D
= 2.25A, V
GS
= 10V, T
C
= 125
o
C
T
C
= 25
o
C, I
S
= 3.5A, V
GS
= 0V
V
DS
= 5V, I
D
= 2.25A
V
DD
≅
34V, I
D
= 2.25A, R
G
= 50
Ω
(Figure 17) MOSFET Switching Times are
Essentially Independent of Operating
Temperature
MIN
100
2
-
-
-
-
-
-
0.75
1
-
-
-
-
60
40
10
-
-
15
15
TYP
-
-
-
-
-
-
0.5
-
-
1.5
-
-
-
-
135
80
20
-
-
-
-
MAX
-
4
250
1000
2.1
±
100
0.600
1.080
1.5
3
15
25
25
20
200
100
25
8.33
175
-
-
UNITS
V
V
µ
A
µ
A
V
nA
Ω
Ω
V
S
ns
ns
ns
ns
pF
pF
pF
o
C/W
o
C/W
Drain to Source Breakdown Voltage
Gate to Threshold Voltage
Zero Gate Voltage Drain Current
On-State Drain Current (Note 2)
Gate to Source Leakage Current
Drain to Source On Resistance (Note 2)
Diode Forward Voltage (Note 2)
Forward Transconductance (Note 2)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Thermal Resistance Junction to Case
Thermal Resistance Junction to Ambient
Safe Operating Area
W
W
Source to Drain Diode Specifications
PARAMETER
Reverse Recovery Time
Reverse Recovered Charge
NOTES:
2. Pulse test: pulse width
≤
300
µ
s, duty cycle
≤
2%.
3. Repetitive rating: pulse width limited by maximum junction temperature. See Transient Thermal Impedance curve (Figure 3).
SYMBOL
t
rr
Q
RR
TEST CONDITIONS
T
J
= 150
o
C, I
SD
= 3.5A, dI
SD
/dt = 100A/
µ
s
T
J
= 150
o
C, I
SD
= 3.5A, dI
SD
/dt = 100A/
µ
s
MIN
-
-
TYP
200
1.0
MAX
-
-
UNITS
ns
µ
C
©2001 Fairchild Semiconductor Corporation
2N6782 Rev. A
2N6782
Typical Performance Curves
1.2
POWER DISSIPATION MULTIPLIER
1.0
0.8
I
D
, DRAIN CURRENT (A)
Unless Otherwise Specified
5
4
3
0.6
0.4
2
0.2
0
0
25
50
75
100
T
C
, CASE TEMPERATURE (
o
C)
125
150
1
0
25
50
75
100
125
150
T
C
, CASE TEMPERATURE (
o
C)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE
TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs
CASE TEMPERATURE
1
THERMAL IMPEDANCE
Z
θJC
, NORMALIZED
0.5
0.2
0.1
0.1
0.05
0.02
0.01
SINGLE PULSE
0.01
10
-5
10
-4
10
-3
10
-2
10
-1
t, RECTANGULAR PULSE DURATION (s)
t
1
t
2
NOTES:
DUTY FACTOR: D = t
1
/t
2
PEAK T
J
= P
DM
x Z
θJC
x R
θJC
+ T
C
1
10
P
DM
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
100
OPERATION IN THIS AREA IS
LIMITED BY r
DS(ON)
12
10
80µs PULSE TEST
10V
I
D
, DRAIN CURRENT (A)
I
D
, DRAIN CURRENT (A)
10
10µs
100µs
1ms
8
6
4
2
0
9V
V
GS
= 8V
1
T
C
= 25
o
C
T
J
= MAX RATED
R
θJC
= 8.33
o
C/W
SINGLE PULSE
10ms
100ms
DC
1000
7V
6V
5V
4V
0
10
20
30
40
50
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
60
-0.1
-1
10
100
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
©2001 Fairchild Semiconductor Corporation
2N6782 Rev. A
2N6782
Typical Performance Curves
10
Unless Otherwise Specified
(Continued)
80µs PULSE TEST
V
GS
= 10V
9.0V
I
D
, DRAIN CURRENT (A)
10
80µs PULSE TEST
I
D
, DRAIN CURRENT (A)
8
6
8.0V
7.0V
T
J
= 125
o
C
T
J
= 25
o
C
1.0
T
J
= -55
o
C
4
6.0V
2
5.0V
4.0V
0
0
1
3
4
5
2
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
6
7
0.1
0
2
4
6
8
10
12
V
GS
, SOURCE TO DRAIN VOLTAGE (V)
14
FIGURE 6. SATURATION CHARACTERISTICS
2.0
r
DS(ON)
, ON-STATE RESISTANCE (Ω)
NORMALIZED ON-RESISTANCE
2.00
1.75
1.50
1.25
1.00
0.75
0.50
FIGURE 7. TRANSFER CHARACTERISTICS
V
GS
= 10V
I
D
= 1.5A
1.5
V
GS
= 10V
1.0
V
GS
= 20V
0.5
0
0
5
10
I
D
, DRAIN CURRENT (A)
15
20
0.25
-80
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
NOTE: Heating effect of 2µs pulse is minimal.
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE
VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON
RESISTANCE vs JUNCTION TEMPERATURE
1.15
NORMALIZED ON-RESISTANCE
1.10
500
V
GS
= 0V, f = 1MHz
C
ISS
= C
GS
+ C
GD
C
RSS
= C
GD
C
OSS
= C
DS
+ C
GD
400
1.05
1.00
0.95
0.90
0.85
0.80
-80
0
-40
0
40
80
120
T
J
, JUNCTION TEMPERATURE (
o
C)
160
10
30
C, CAPACITANCE (pF)
300
200
C
ISS
100
C
OSS
C
RSS
0
20
40
50
V
DS
, DRAIN TO SOURCE VOLTAGE (V)
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN
VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
©2001 Fairchild Semiconductor Corporation
2N6782 Rev. A
2N6782
Typical Performance Curves
2.5
g
fs
, TRANSCONDUCTANCE (S)
Unless Otherwise Specified
(Continued)
I
DR
, REVERSE DRAIN CURRENT (A)
80µs PULSE TEST
T
J
= -55
o
C
T
J
= 25
o
C
10
5
2
1.0
0.5
80ms PULSE TEST
2.0
T
J
= 150
o
C
T
J
= 25
o
C
1.5
T
J
= 125
o
C
1.0
0.5
0.2
0.1
0
0
2
4
6
8
10
I
D
, DRAIN CURRENT (A)
12
14
0
0.4
0.8
1.2
1.6
2.0
2.2
V
SD
, SOURCE TO DRAIN VOLTAGE (V)
2.4
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
20
V
GS
, GATE TO SOURCE VOLTAGE (V)
I
D
= 8A
V
DS
= 20V
V
DS
= 50V
V
DS
= 80V
15
10
5
0
0
2
4
6
8
Q
g
, TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
©2001 Fairchild Semiconductor Corporation
2N6782 Rev. A
京公网安备 11010802033920号
EEWORLD
