A3P250-1FG144YT datasheet, PDF

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A3P250-1FG144YT: DescriptionField Programmable Gate Array,; CategoryProgrammable logic devices Programmable logic; File Size8MB，154 Pages; ManufacturerMicrosemi; Websitehttps://www.microsemi.com

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A3P250-1FG144YT Overview

Field Programmable Gate Array,

A3P250-1FG144YT Parametric

Parameter Name	Attribute value
Is it Rohs certified?	incompatible
Maker	Microsemi
package instruction	,
Reach Compliance Code	compliant
JESD-609 code	e0
Humidity sensitivity level	3
Peak Reflow Temperature (Celsius)	235
Programmable logic type	FIELD PROGRAMMABLE GATE ARRAY
Terminal surface	TIN LEAD SILVER
Maximum time at peak reflow temperature	20

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Revision 5

Automotive ProASIC3 Flash Family FPGAs

Features and Benefits

Extended Temperature AEC-Q100–Qualified Devices

• Grade 2: –40°C to 105°C T

(115°C T

)

• Grade 1: –40°C to 125°C T

(135°C T

)

• PPAP Documentation

Low Power

• 1.5 V Core Voltage

• Support for 1.5-V-Only Systems

• Low-Impedance Flash Switches

High-Performance Routing Hierarchy

• Segmented, Hierarchical Routing and Clock Structure

• High-Performance, Low-Skew Global Network

• Architecture Supports Ultra-High Utilization

Firm-Error Immune

• Only Automotive FPGAs to Offer Firm-Error Immunity

• Can Be Used without Configuration Upset Risk

Advanced I/O

•

700 Mbps DDR, LVDS-Capable I/Os

1.5 V, 1.8 V, 2.5 V, and 3.3 V Mixed-Voltage Operation

Bank-Selectable I/O Voltages—up to 4 Banks per Chip

Single-Ended I/O Standards: LVTTL, LVCMOS 3.3 V /

2.5 V / 1.8 V / 1.5 V, 3.3 V PCI / 3.3 V PCI-X, and LVCMOS

2.5 V / 5.0 V Input

Differential I/O Standards: LVPECL, LVDS, B-LVDS, and

M-LVDS (A3P250 and A3P1000)

I/O Registers on Input, Output, and Enable Paths

Hot-Swappable and Cold-Sparing I/Os

Programmable Output Slew Rate and Drive Strength

Weak Pull-Up/-Down

IEEE 1149.1 (JTAG) Boundary Scan Test

Pin-Compatible Packages across the Automotive ProASIC

Family

High Capacity

• 60 k to 1 M System Gates

• Up to 144 kbits of SRAM

• Up to 300 User I/Os

Reprogrammable Flash Technology

• 130-nm, 7-Layer Metal (6 Copper), Flash-Based CMOS

Automotive Process

• Instant On Level 0 Support

• Single-Chip Solution

• Retains Programmed Design when Powered Off

On-Chip User Nonvolatile Memory

• 1 kbit of FlashROM with Synchronous Interface

High Performance

• 350 MHz System Performance

• 3.3 V, 66 MHz 64-Bit PCI

Clock Conditioning Circuit (CCC) and PLL

• Six CCC Blocks, One with an Integrated PLL

• Configurable Phase Shift, Multiply/Divide, Delay Capabilities,

and External Feedback

• Wide Input Frequency Range (1.5 MHz up to 350 MHz)

In-System Programming (ISP) and Security

• ISP Using On-Chip 128-Bit Advanced Encryption Standard

(AES) Decryption via JTAG (IEEE 1532–compliant)

• FlashLock

Designed to Provide High-Level Security for FPGA

Contents (anti-tampering)

SRAMs

• Variable-Aspect-Ratio 4,608-Bit RAM Blocks (×1, ×2, ×4, ×9,

and ×18 organizations available)

Table 1 • Automotive ProASIC3 Product Family

ProASIC3 Devices

System Gates

VersaTiles (D-flip-flops)

RAM kbits (1,024 bits)

4,608-Bit Blocks

FlashROM Bits

Secure (AES) ISP

Integrated PLL in CCCs

VersaNet Globals1

I/O Banks

Maximum User I/Os

Package Pins

VQFP

FBGA

QFN

A3P060

60 k

1,536

Yes

VQ100

FG144

A3P125

125 k

3,072

Yes

133

VQ100

FG144

QNG132

A3P250

250 k

6,144

Yes

157

VQ100

FG144, FG256

QNG132

A3P1000

24,576

144

Yes

300

FG144, FG256, FG484

Notes:

1. Six chip-wide (main) globals and three additional global networks in each quadrant are available.

2. QFN packages are available as RoHS compliant only.

January 2013

Automotive ProASIC3 Flash Family FPGAs

Table of Contents

Automotive ProASIC3 Device Family Overview

General Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1-1

Automotive ProASIC3 DC and Switching Characteristics

General Specifications . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-1

Calculating Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-6

User I/O Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-12

VersaTile Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-69

Global Resource Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-75

Clock Conditioning Circuits . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-80

Embedded SRAM and FIFO Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-82

Embedded FlashROM Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-96

JTAG 1532 Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2-97

Pin Descriptions and Packaging

Supply Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

User Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

JTAG Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Special Function Pins . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Packaging . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

Related Documents . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .

3-1

3-2

3-3

3-4

Package Pin Assignments

VQ100

QN132

FG144

FG256

FG484

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-1

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-5

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-10

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-19

. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4-26

Datasheet Information

List of Changes . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-1

Datasheet Categories . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4

Safety Critical, Life Support, and High-Reliability Applications Policy . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5-4

Revision 5

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