Philips Semiconductors
Product specification
Digital video encoder
1
FEATURES
SAA7128AH; SAA7129AH
•
Monolithic CMOS 3.3 V device, 5 V I
2
C-bus optional
•
Digital PAL/NTSC/SECAM encoder
•
System pixel frequency 13.5 MHz
•
54 MHz double-speed multiplexed D1 interface capable
of splitting data into two separate channels (encoded
and baseband)
•
Three Digital-to-Analog Converters (DACs) for CVBS
(CSYNC), VBS (CVBS) and C (CVBS) two times
oversampled with 10-bit resolution (signals in brackets
optional)
•
Three DACs for RED (C
R
), GREEN (Y) and BLUE (C
B
)
two times oversampled with 9-bit resolution (signals in
brackets optional)
•
Alternatively, an advanced composite sync is available
on the CVBS output for RGB display centring
•
Real-time control of subcarrier
•
Cross-colour reduction filter
•
Closed captioning encoding and World Standard
Teletext (WST) and North-American Broadcast Text
System (NABTS) teletext encoding including sequencer
and filter
•
Copy Generation Management System (CGMS)
encoding (CGMS described by standard CPR-1204 of
EIAJ); 20 bits in lines 20/283 (NTSC) can be loaded via
I
2
C-bus
•
Fast I
2
C-bus control port (400 kHz)
•
Line 23 Wide Screen Signalling (WSS) encoding
•
Video Programming System (VPS) data encoding in
line 16 (50/625 lines counting)
•
Encoder can be master or slave
•
Programmable horizontal and vertical input
synchronization phase
•
Programmable horizontal sync output phase
•
Internal Colour Bar Generator (CBG)
3
ORDERING INFORMATION
PACKAGE
TYPE NUMBER
NAME
SAA7128AH
SAA7129AH
QFP44
DESCRIPTION
plastic quad flat package; 44 leads (lead length 1.3 mm);
body 10
×
10
×
1.75 mm
VERSION
SOT307-2
(1) Macrovision™ is a trademark of the Macrovision Corporation.
•
Macrovision™
(1)
Pay-per-View copy protection system
rev. 7.01 and rev. 6.1 as option; this applies to
SAA7128AH only. The device is protected by USA
patent numbers 4631603, 4577216 and 4819098 and
other intellectual property rights. Use of the Macrovision
anti-copy process in the device is licensed for
non-commercial home use only. Reverse engineering or
disassembly is prohibited. Please contact your nearest
Philips Semiconductors sales office for more information
•
Controlled rise/fall times of output syncs and blanking
•
On-chip crystal oscillator (3rd-harmonic or fundamental
crystal)
•
Down mode (low output voltage) or power-save mode of
DACs
•
QFP44 package.
2
GENERAL DESCRIPTION
The SAA7128AH; SAA7129AH encodes digital C
B
-Y-C
R
video data to an NTSC, PAL or SECAM CVBS or S-video
signal. Simultaneously, RGB or bypassed but interpolated
C
B
-Y-C
R
signals are available via three additional DACs.
Through a 54 MHz multiplexed digital D1 input port, the
circuit accepts two ITU-R BT.656 compatible C
B
-Y-C
R
data streams with 720 active pixels per line in
4 : 2 : 2 multiplexed formats. For example, MPEG
decoded data with overlay and MPEG decoded data
without overlay, where one data stream is latched at the
rising, the other one is latched at the falling clock edge.
It includes a sync/clock generator and on-chip DACs.
2003 Dec 09
3
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