PRELIMINARY
Am29F080
8 Megabit (1,048,576 x 8-Bit) CMOS 5.0 Volt-only,
Sector Erase Flash Memory
DISTINCTIVE CHARACTERISTICS
s
5.0 Volt
±
10% for read and write operations
— Minimizes system level power requirements
s
Compatible with JEDEC-standards
— Pinout and software compatible with
single-power-supply Flash
— Superior inadvertent write protection
s
Package Options
— 40-pin TSOP
— 44-pin PSOP
s
Minimum 100,000 write/erase cycles guaranteed
s
High performance
— 85 ns maximum access time
s
Sector erase architecture
— Uniform sectors of 64 Kbytes each
— Any combination of sectors can be erased.
Also supports full chip erase
s
Group sector protection
— Hardware method that disables any combination
of sector groups from write or erase operations
(a sector group consists of 2 adjacent sectors of
64 Kbytes each)
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Embedded Erase™ Algorithms
— Automatically preprograms and erases the chip
or any sector
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Embedded Program™ Algorithms
— Automatically programs and verifies data at
specified address
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Data Polling and Toggle Bit feature for detection
of program or erase cycle completion
s
Ready/Busy output (RY/BY)
— Hardware method for detection of program or
erase cycle completion
s
Erase Suspend/Resume
— Supports
reading or programming
data to a
sector not being erased
s
Low power consumption
— 30 mA maximum active read current
— 60 mA maximum program/erase current
s
Enhanced power management for standby
mode
— <1
µ
A typical standby current
— Standard access time from standby mode
s
Hardware RESET pin
— Resets internal state machine to the read mode
5.0 V-only Flash
GENERAL DESCRIPTION
The Am29F080 is an 8 Mbit, 5.0 Volt-only Flash mem-
ory organized as 1 Megabyte of 8 bits. The 1 Mbyte of
data is divided into 16 sectors of 64 Kbytes for flexible
erase capability. The 8 bits of data will appear on DQ0–
DQ7. The Am29F080 is offered in a 40-pin TSOP, or
44-pin PSOP package. This device is designed to be
programmed in-system with the standard system
5.0 volt V
CC
supply. 12.0 volt V
PP
is not required for
program or erase operations. The device can also be
reprogrammed in standard EPROM programmers.
The standard Am29F080 offers access times of 85 ns,
90 ns, 120 ns, and 150 ns allowing operation of high-
speed microprocessors without wait states. To
eliminate bus contention the device has separate chip
enable (CE), write enable (WE), and output enable
(OE) controls.
The Am29F080 is entirely command set compatible
with the JEDEC single-power-supply Flash standard.
Commands are written to the command register using
standard microprocessor write timings. Register
contents serve as input to an internal state-machine
which controls the erase and programming circuitry.
Write cycles also internally latch addresses and data
This document contains information on a product under development at Advanced Micro Devices. The information
is intended to help you evaluate this product. AMD reserves the right to change or discontinue work on this proposed
product without notice.
Publication#
19643
Rev:
A
Amendment/+1
Issue Date:
April 1997
P R E L I M I N A R Y
needed for the programming and erase operations.
Reading data out of the device is similar to reading
from 12.0 volt Flash or conventional EPROM devices.
The Am29F080 is programmed by executing the
program command sequence. This will invoke the
Embedded Program Algorithm which is an internal al-
gorithm that automatically times the program pulse
widths and verifies proper cell margin. Erase is accom-
plished by executing the erase command sequence.
This will invoke the Embedded Erase Algorithm which
is an internal algorithm that automatically preprograms
the array if it is not already programmed before execut-
ing the erase operation. During erase, the device auto-
matically times the erase pulse widths and verifies
proper cell margin.
This device also features a sector erase architecture.
This allows for sectors of memory to be erased and re-
programmed without affecting the data contents of
other sectors. A sector is typically erased and verified
within one second. The Am29F080 is erased when
shipped from the factory.
The Am29F080 device also features hardware sector
group protection. This feature will disable both program
and erase operations in any combination of eight sector
groups of memory.
A sector group consists of two adja-
cent sectors grouped in the following pattern: sectors
0–1, 2–3, 4–5, 6–7, 8–9, 10–11, 12–13, and 14–15.
AMD has implemented an Erase Suspend feature that
enables the user to put erase on hold for any period of
time to read data from, or program data to, a sector that
was not being erased. Thus, true background erase
can be achieved.
The device features single 5.0 volt power supply oper-
ation for both read and write functions. Internally gen-
erated and regulated voltages are provided for the
program and erase operations. A low V
CC
detector au-
tomatically inhibits write operations during power tran-
sitions. The end of program or erase is detected by the
RY/BY pin, Data Polling of DQ7, or by the Toggle Bit I
(DQ6).Once the end of a program or erase cycle has
been completed, the device automatically resets to the
read mode.
The Am29F080 also has a hardware RESET pin. When
this pin is driven low, execution of any Embedded Pro-
gram Algorithm or Embedded Erase Algorithm will be
terminated. The internal state machine will then be
reset into the read mode. The RESET pin may be tied
to the system reset circuitry. Therefore, if a system
reset occurs during the Embedded Program Algorithm
or Embedded Erase Algorithm, the device will be auto-
matically reset to the read mode and will leave errone-
ous data stored in the address locations being
operated on. These locations will need re-writing after
the Reset. Resetting the device will enable the sys-
tem’s microprocessor to read the boot-up firmware
from the Flash memory.
AMD’s Flash technology combines years of Flash
memory manufacturing experience to produce the
highest levels of quality, reliability and cost effective-
ness. The Am29F080 memory electrically erases all
bits within a sector simultaneously via Fowler-Nord-
heim tunneling. The bytes are programmed one byte at
a time using the EPROM programming mechanism of
hot electron injection.
Flexible Sector-Erase Architecture
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Sixteen 64 Kbyte sectors
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Eight sector groups each of which consists of
2 adjacent sectors in the following pattern: sectors
0–1, 2–3, 4–5, 6–7, 8–9, 10–11, 12–13, and 14–15
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Individual-sector or multiple-sector erase capability
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Sector group protection is user-definable
0EFFFFh
SA15
SA14
SA13
SA12
64 Kbyte
0DFFFFh
64 Kbyte
0CFFFFh
64 Kbyte
0BFFFFh
64 Kbyte
0AFFFFh
09FFFFh
08FFFFh
07FFFFh
16 Sectors Total
06FFFFh
05FFFFh
04FFFFh
03FFFFh
SA3
SA2
SA1
SA0
64 Kbyte
02FFFFh
64 Kbyte
01FFFFh
64 Kbyte
00FFFFh
64 Kbyte
000000h
Sector
Group
0
19643A-25
Sector
Group
7
2
Am29F080
Test/Measurement
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