IBM25PPC750CX-BP10-3T datasheet, PDF

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IBM25PPC750CX-BP10-3T: DescriptionRISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256; CategoryThe embedded processor and controller Microcontrollers and processors; File Size510KB，43 Pages; ManufacturerIBM; Websitehttp://www.ibm.com

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IBM25PPC750CX-BP10-3T Overview

RISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256

IBM25PPC750CX-BP10-3T Parametric

Parameter Name	Attribute value
Maker	IBM
Parts packaging code	BGA
package instruction	BGA,
Contacts	256
Reach Compliance Code	unknown
ECCN code	3A001.A.3
Address bus width	32
bit size	32
boundary scan	YES
maximum clock frequency	133 MHz
External data bus width	64
Format	FLOATING POINT
Integrated cache	YES
JESD-30 code	S-PBGA-B256
length	27 mm
low power mode	YES
Number of terminals	256
Package body material	PLASTIC/EPOXY
encapsulated code	BGA
Package shape	SQUARE
Package form	GRID ARRAY
Certification status	Not Qualified
speed	366 MHz
Maximum supply voltage	1.9 V
Minimum supply voltage	1.7 V
Nominal supply voltage	1.8 V
surface mount	YES
technology	CMOS
Terminal form	BALL
Terminal pitch	1.27 mm
Terminal location	BOTTOM
width	27 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC

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PowerPC 750CX RISC Microprocessor

Datasheet

Version 1.2

June 20, 2001

IBM Microelectronics Division

PowerPC 750CX RISC Microprocessor Datasheet

Table of Contents

1.0. Preface .........................................................................................................................................7

1.1. Special Design Level Considerations/Features .....................................................................7

2.0. Overview .....................................................................................................................................8

2.1. PowerPC 750CX RISC Microprocessor Block Diagram .....................................................8

3.0. Features .......................................................................................................................................9

4.0. General Parameters ...................................................................................................................11

5.0. Electrical and Thermal Characteristics .....................................................................................11

5.1. DC Electrical Characteristics...............................................................................................11

5.2. AC Electrical Characteristics...............................................................................................14

5.2.1. Clock AC Specifications .........................................................................................14

5.3. 60X Bus Input AC Specifications .......................................................................................16

5.4. 60X Bus Output AC Specifications.....................................................................................17

5.4.1. IEEE 1149.1 AC Timing Specifications .................................................................19

6.0. PowerPC 750CX Microprocessor Dimension and Physical Signal Assignments ....................22

7.0. System Design Information .......................................................................................................29

7.1. PLL Configuration...............................................................................................................29

7.2. PLL Power Supply Filtering................................................................................................31

7.3. Decoupling Recommendations............................................................................................31

7.4. Connection Recommendations ............................................................................................31

7.5. Output Buffer DC Impedance..............................................................................................32

7.5.1. Input-Output Usage .................................................................................................33

7.6. Thermal Management Information......................................................................................36

7.7. Heat Sink Considerations ....................................................................................................36

7.8. Internal Package Conduction Resistance.............................................................................36

7.9. Operational and Design Considerations ..............................................................................38

7.9.1. Level Protection ......................................................................................................38

7.9.2. 64 or 32-Bit Data Bus Mode ...................................................................................38

7.9.3. 1.8V and 2.5V I/O Signal Support ..........................................................................38

7.9.4. DBWO/L2_TSTCLK ..............................................................................................39

7.9.5. PowerPC 750CX Revision Level Migration ...........................................................39

8.0. Ordering Information ................................................................................................................39

9.0. Processor Version Register (PVR) ............................................................................................40

10.0.Document History .....................................................................................................................41

June 20, 2001

Version 1.2

Page 3

PowerPC 750CX RISC Microprocessor Datasheet

List of Figures

Figure 1. PowerPC 750CX RISC Microprocessor Block Diagram .............................................. 8

Figure 2. SYSCLK Input Timing Diagram ................................................................................... 15

Figure 3. Input Timing Diagram .................................................................................................... 16

Figure 4. Mode Select Input Timing Diagram ............................................................................... 17

Figure 5. Output Valid Timing Definition ..................................................................................... 18

Figure 6. Output Timing Diagram for PowerPC 750CX RISC Microprocessor .......................... 19

Figure 7. JTAG Clock Input Timing Diagram .............................................................................. 20

Figure 8. TRST Timing Diagram .................................................................................................. 21

Figure 9. Boundary-Scan Timing Diagram ................................................................................... 21

Figure 10. Test Access Port Timing Diagram ................................................................................. 22

Figure 11. Pinout of the 256 PBGA Package as Viewed from Solder Ball side ............................. 23

Figure 12. Side Profile View of PBGA ........................................................................................... 24

Figure 13. Side Profile View Showing Exposed Cavity .................................................................. 24

Figure 14. PowerPC 750CX Microprocessor Ball Placement ......................................................... 25

Figure 15. PLL Power Supply Filter Circuit ................................................................................... 31

Figure 16. Driver Impedance Measurement .................................................................................... 32

Figure 17. IBM RISCWatch

JTAG to HRESET, TRST, and SRESET Signal Connector ........ 36

Figure 18. PBGA Package with Thermal Model ............................................................................. 37

Figure 19. IBM Part Number Key ................................................................................................... 40

Page 4

Version 1.2

June 20, 2001

PowerPC 750CX RISC Microprocessor Datasheet

List of Tables

Table 1: Absolute Maximum Ratings ......................................................................................... 11

Table 2: Recommended Operating Conditions

1 ............................................................................................. 12

Table 3: Package Thermal Characteristics .................................................................................. 12

Table 4: DC Electrical Specifications ......................................................................................... 13

Table 5: Power Consumption ...................................................................................................... 14

Table 6: Clock AC Timing Specifications

1,6 ................................................................................................... 15

Table 7: 60X Bus Input Timing Specifications

1,6,8 ....................................................................................... 16

Table 8: 60X Bus Output AC Timing Specifications

1,4,6,7 ........................................................................ 17

Table 9: JTAG AC Timing Specifications (Independent of SYSCLK) ...................................... 20

Table 10: Signal Listing for the 256 PBGA Package ................................................................... 26

Table 11: Signals Removed from Previous PowerPC 750 Designs .............................................. 27

Table 12: Signal Locations ............................................................................................................ 28

Table 13: Voltage and Ground Assignments ................................................................................ 29

Table 14: PowerPC 750CX Microprocessor PLL Configuration ................................................. 30

Table 15: Driver Impedance Characteristics ................................................................................. 32

Table 16: Input-Output Usage ....................................................................................................... 34

Table 17: Summary of Design Migration ..................................................................................... 39

Table 18: Process Version Register (PVR) ................................................................................... 40

Table 19: Document History ......................................................................................................... 41

June 20, 2001

Version 1.2

Page 5

IBM25PPC750CX-BP10-3T Related Products

	IBM25PPC750CX-BP10-3T	IBM25PPC750CX-DP10-3T	IBM25PPC750CX-AP10-3T	IBM25PPC750CX-CP10-3T
Description	RISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256	RISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256	RISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256	RISC Microprocessor, 32-Bit, 366MHz, CMOS, PBGA256, PLASTIC, BGA-256
Maker	IBM	IBM	IBM	IBM
Parts packaging code	BGA	BGA	BGA	BGA
package instruction	BGA,	BGA, BGA256,20X20,50	BGA,	BGA, BGA256,20X20,50
Contacts	256	256	256	256
Reach Compliance Code	unknown	unknown	unknow	unknow
ECCN code	3A001.A.3	3A001.A.3	3A001.A.3	3A001.A.3
Address bus width	32	32	32	32
bit size	32	32	32	32
boundary scan	YES	YES	YES	YES
maximum clock frequency	133 MHz	133 MHz	133 MHz	133 MHz
External data bus width	64	64	64	64
Format	FLOATING POINT	FLOATING POINT	FLOATING POINT	FLOATING POINT
Integrated cache	YES	YES	YES	YES
JESD-30 code	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256	S-PBGA-B256
length	27 mm	27 mm	27 mm	27 mm
low power mode	YES	YES	YES	YES
Number of terminals	256	256	256	256
Package body material	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY	PLASTIC/EPOXY
encapsulated code	BGA	BGA	BGA	BGA
Package shape	SQUARE	SQUARE	SQUARE	SQUARE
Package form	GRID ARRAY	GRID ARRAY	GRID ARRAY	GRID ARRAY
Certification status	Not Qualified	Not Qualified	Not Qualified	Not Qualified
speed	366 MHz	366 MHz	366 MHz	366 MHz
Maximum supply voltage	1.9 V	1.9 V	1.9 V	1.9 V
Minimum supply voltage	1.7 V	1.7 V	1.7 V	1.7 V
Nominal supply voltage	1.8 V	1.8 V	1.8 V	1.8 V
surface mount	YES	YES	YES	YES
technology	CMOS	CMOS	CMOS	CMOS
Terminal form	BALL	BALL	BALL	BALL
Terminal pitch	1.27 mm	1.27 mm	1.27 mm	1.27 mm
Terminal location	BOTTOM	BOTTOM	BOTTOM	BOTTOM
width	27 mm	27 mm	27 mm	27 mm
uPs/uCs/peripheral integrated circuit type	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC	MICROPROCESSOR, RISC

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