EEWORLDEEWORLDEEWORLD

Part Number

Search

DT18N12KOF-K

Description
Silicon Controlled Rectifier, 40A I(T)RMS, 18000mA I(T), 1200V V(DRM), 1200V V(RRM), 1 Element, MODULE-5
CategoryAnalog mixed-signal IC    Trigger device   
File Size33KB,1 Pages
ManufacturerEUPEC [eupec GmbH]
Download Datasheet Parametric View All

DT18N12KOF-K Overview

Silicon Controlled Rectifier, 40A I(T)RMS, 18000mA I(T), 1200V V(DRM), 1200V V(RRM), 1 Element, MODULE-5

DT18N12KOF-K Parametric

Parameter NameAttribute value
MakerEUPEC [eupec GmbH]
package instructionMODULE-5
Reach Compliance Codeunknown
Shell connectionISOLATED
Nominal circuit commutation break time80 µs
ConfigurationSINGLE WITH BUILT-IN FREE-WHEELING DIODE
Critical rise rate of minimum off-state voltage1000 V/us
Maximum DC gate trigger current150 mA
Maximum DC gate trigger voltage2.5 V
Quick connection descriptionG-GR
Description of screw terminals2A-CK
JESD-30 codeR-PUFM-X5
On-state non-repetitive peak current350 A
Number of components1
Number of terminals5
Maximum on-state current18000 A
Maximum operating temperature125 °C
Package body materialPLASTIC/EPOXY
Package shapeRECTANGULAR
Package formFLANGE MOUNT
Certification statusNot Qualified
Maximum rms on-state current40 A
Off-state repetitive peak voltage1200 V
Repeated peak reverse voltage1200 V
surface mountNO
Terminal formUNSPECIFIED
Terminal locationUPPER
Trigger device typeSCR
Origin of "Circuit Observation Room"
"Circuit Observation Room" is finally here.  The purpose of establishing such a page as "Circuit Observation Room" is to evaluate various circuits. Of course, there is no need to evaluate the well-kno...
maychang Circuit Observation Room
How can a 26V voltage be converted to TTL level? What chip should be used?
The high level of the signal is 26V and the low level is 0V. I want to use a microcontroller to detect the high and low levels of the signal, so I have to pull it to 5V. What should I do?...
lx2233456 MCU
The Altera SOC FPGA startup steps are summarized by me after more than a year of practice, and now I share them with you!!
[i=s] This post was last edited by yupc123 on 2016-1-26 09:15 [/i] After more than a year of practice, I have summarized the Altera SOC FPGA startup steps, which will be helpful for everyone in future...
yupc123 FPGA/CPLD
Summary of embedded system foundation, knowledge and interface technology
[b][b][color=rgb(34, 34, 34)][font=Helvetica][size=18pt]13. Evaluation methods for embedded systems: measurement method and model method [/font][/size][/font][/color][/b][b][color=rgb(34, 34, 34)][/co...
jingcheng Linux and Android
How to prevent leakage
Although the static voltage is high, the current is very small, and people generally do not feel anything when they touch it. Touching the monitor with your hand is an example. Although the static ele...
techbase Industrial Control Electronics
Looking for Chinese information on MAX3232
Looking for Chinese information on MAX3232...
starli521 MCU

EEWorld
subscription
account

EEWorld
service
account

Automotive
development
circle

Robot
development
community

Index Files: 1858  1753  1998  1029  1835  38  36  41  21  37 
Datasheet   0 1 2 3 4 5 6 7 8 9 A B C D E F G H I J K L M N O P Q R S T U V W X Y Z
Room 1530, 15th Floor, Building B, No. 18 Zhongguancun Street, Haidian District, Beijing Telephone: (010) 82350740 Postal Code: 100190
Copyright © 2005-2026 EEWORLD.com.cn, Inc. All rights reserved 京ICP证060456号 京ICP备10001474号-1 电信业务审批[2006]字第258号函 京公网安备 11010802033920号